diff options
author | Seema Khowala <seemaj@nvidia.com> | 2017-06-26 02:09:12 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-07-19 02:42:01 -0400 |
commit | f8dbb60882ebdb021f285b99270296fe76e4f2f4 (patch) | |
tree | bcef9efbfe87e6d97e8b28fc64280440f15ee2cc /drivers/gpu/nvgpu/gk20a | |
parent | 994a60385166725cc007731c0ff353d4d643eeed (diff) |
gpu: nvgpu: update_smpc_ctxsw_mode changes for t19x
Support t19x ctx header changes
Bug 200313979
Change-Id: Ide5c5f9f3227bd6aba530e736896006fb72d4d19
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1508549
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 25 |
1 files changed, 22 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 618c276b..838fe494 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -1606,6 +1606,8 @@ int gr_gk20a_update_smpc_ctxsw_mode(struct gk20a *g, | |||
1606 | struct nvgpu_mem *mem; | 1606 | struct nvgpu_mem *mem; |
1607 | u32 data; | 1607 | u32 data; |
1608 | int ret; | 1608 | int ret; |
1609 | struct ctx_header_desc *ctx = &c->ch_ctx.ctx_header; | ||
1610 | struct nvgpu_mem *ctxheader = &ctx->mem; | ||
1609 | 1611 | ||
1610 | gk20a_dbg_fn(""); | 1612 | gk20a_dbg_fn(""); |
1611 | 1613 | ||
@@ -1637,18 +1639,35 @@ int gr_gk20a_update_smpc_ctxsw_mode(struct gk20a *g, | |||
1637 | goto out; | 1639 | goto out; |
1638 | } | 1640 | } |
1639 | 1641 | ||
1640 | data = nvgpu_mem_rd(g, mem, | 1642 | if (nvgpu_mem_begin(g, ctxheader)) { |
1643 | ret = -ENOMEM; | ||
1644 | goto clean_up_mem; | ||
1645 | } | ||
1646 | if (ctxheader->gpu_va) | ||
1647 | data = nvgpu_mem_rd(g, ctxheader, | ||
1648 | ctxsw_prog_main_image_pm_o()); | ||
1649 | else | ||
1650 | data = nvgpu_mem_rd(g, mem, | ||
1641 | ctxsw_prog_main_image_pm_o()); | 1651 | ctxsw_prog_main_image_pm_o()); |
1652 | |||
1642 | data = data & ~ctxsw_prog_main_image_pm_smpc_mode_m(); | 1653 | data = data & ~ctxsw_prog_main_image_pm_smpc_mode_m(); |
1643 | data |= enable_smpc_ctxsw ? | 1654 | data |= enable_smpc_ctxsw ? |
1644 | ctxsw_prog_main_image_pm_smpc_mode_ctxsw_f() : | 1655 | ctxsw_prog_main_image_pm_smpc_mode_ctxsw_f() : |
1645 | ctxsw_prog_main_image_pm_smpc_mode_no_ctxsw_f(); | 1656 | ctxsw_prog_main_image_pm_smpc_mode_no_ctxsw_f(); |
1646 | nvgpu_mem_wr(g, mem, | 1657 | |
1658 | if (ctxheader->gpu_va) | ||
1659 | nvgpu_mem_wr(g, ctxheader, | ||
1660 | ctxsw_prog_main_image_pm_o(), | ||
1661 | data); | ||
1662 | else | ||
1663 | nvgpu_mem_wr(g, mem, | ||
1647 | ctxsw_prog_main_image_pm_o(), | 1664 | ctxsw_prog_main_image_pm_o(), |
1648 | data); | 1665 | data); |
1649 | 1666 | ||
1650 | nvgpu_mem_end(g, mem); | 1667 | nvgpu_mem_end(g, ctxheader); |
1651 | 1668 | ||
1669 | clean_up_mem: | ||
1670 | nvgpu_mem_end(g, mem); | ||
1652 | out: | 1671 | out: |
1653 | gk20a_enable_channel_tsg(g, c); | 1672 | gk20a_enable_channel_tsg(g, c); |
1654 | return ret; | 1673 | return ret; |