diff options
author | Alex Frid <afrid@nvidia.com> | 2014-07-24 02:42:35 -0400 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:10:35 -0400 |
commit | ea530792c4bead6059fcb56541c7b57162ea0e0e (patch) | |
tree | 8d99cd985677e5bfa724ced664e93f86c5573daf /drivers/gpu/nvgpu/gk20a | |
parent | 4b89dfd82058ffdd63931e89821509b8003d0ffd (diff) |
gpu: nvgpu: Make clock operations static
Made GK20A and GM20B clock operations static, since they are invoked
only via HAL interfaces.
Bug 1450787
Change-Id: Ia30218ad4244bd8790b5ef96d1963678d0ba39e1
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/441710
Reviewed-by: Bo Yan <byan@nvidia.com>
Tested-by: Bo Yan <byan@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/clk_gk20a.c | 30 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/clk_gk20a.h | 2 |
2 files changed, 15 insertions, 17 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/clk_gk20a.c b/drivers/gpu/nvgpu/gk20a/clk_gk20a.c index 08e10901..517e8e49 100644 --- a/drivers/gpu/nvgpu/gk20a/clk_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/clk_gk20a.c | |||
@@ -624,7 +624,7 @@ static int gk20a_clk_register_export_ops(struct gk20a *g) | |||
624 | return ret; | 624 | return ret; |
625 | } | 625 | } |
626 | 626 | ||
627 | int gk20a_init_clk_support(struct gk20a *g) | 627 | static int gk20a_init_clk_support(struct gk20a *g) |
628 | { | 628 | { |
629 | struct clk_gk20a *clk = &g->clk; | 629 | struct clk_gk20a *clk = &g->clk; |
630 | u32 err; | 630 | u32 err; |
@@ -674,6 +674,20 @@ int gk20a_init_clk_support(struct gk20a *g) | |||
674 | return err; | 674 | return err; |
675 | } | 675 | } |
676 | 676 | ||
677 | static int gk20a_suspend_clk_support(struct gk20a *g) | ||
678 | { | ||
679 | int ret; | ||
680 | |||
681 | clk_disable(g->clk.tegra_clk); | ||
682 | |||
683 | /* The prev call may not disable PLL if gbus is unbalanced - force it */ | ||
684 | mutex_lock(&g->clk.clk_mutex); | ||
685 | ret = clk_disable_gpcpll(g, 1); | ||
686 | g->clk.clk_hw_on = false; | ||
687 | mutex_unlock(&g->clk.clk_mutex); | ||
688 | return ret; | ||
689 | } | ||
690 | |||
677 | void gk20a_init_clk_ops(struct gpu_ops *gops) | 691 | void gk20a_init_clk_ops(struct gpu_ops *gops) |
678 | { | 692 | { |
679 | gops->clk.init_clk_support = gk20a_init_clk_support; | 693 | gops->clk.init_clk_support = gk20a_init_clk_support; |
@@ -700,20 +714,6 @@ int gk20a_clk_set_rate(struct gk20a *g, unsigned long rate) | |||
700 | return clk_set_rate(g->clk.tegra_clk, rate); | 714 | return clk_set_rate(g->clk.tegra_clk, rate); |
701 | } | 715 | } |
702 | 716 | ||
703 | int gk20a_suspend_clk_support(struct gk20a *g) | ||
704 | { | ||
705 | int ret; | ||
706 | |||
707 | clk_disable(g->clk.tegra_clk); | ||
708 | |||
709 | /* The prev call may not disable PLL if gbus is unbalanced - force it */ | ||
710 | mutex_lock(&g->clk.clk_mutex); | ||
711 | ret = clk_disable_gpcpll(g, 1); | ||
712 | g->clk.clk_hw_on = false; | ||
713 | mutex_unlock(&g->clk.clk_mutex); | ||
714 | return ret; | ||
715 | } | ||
716 | |||
717 | #ifdef CONFIG_DEBUG_FS | 717 | #ifdef CONFIG_DEBUG_FS |
718 | 718 | ||
719 | static int rate_get(void *data, u64 *val) | 719 | static int rate_get(void *data, u64 *val) |
diff --git a/drivers/gpu/nvgpu/gk20a/clk_gk20a.h b/drivers/gpu/nvgpu/gk20a/clk_gk20a.h index 4226a375..debd6fbc 100644 --- a/drivers/gpu/nvgpu/gk20a/clk_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/clk_gk20a.h | |||
@@ -60,8 +60,6 @@ struct clk_gk20a { | |||
60 | }; | 60 | }; |
61 | 61 | ||
62 | /* APIs used for separate HAL */ | 62 | /* APIs used for separate HAL */ |
63 | int gk20a_init_clk_support(struct gk20a *g); | ||
64 | int gk20a_suspend_clk_support(struct gk20a *g); | ||
65 | struct clk *gk20a_clk_get(struct gk20a *g); | 63 | struct clk *gk20a_clk_get(struct gk20a *g); |
66 | 64 | ||
67 | /* APIs used for both GK20A and GM20B */ | 65 | /* APIs used for both GK20A and GM20B */ |