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authorAlex Waterman <alexw@nvidia.com>2017-10-05 20:22:41 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-10-20 22:03:57 -0400
commite26ce10cc6b59314ccf5931a8c5b46a9e57b085a (patch)
tree2bcafc57fcb8679c09195ba08ccf7a6fdfc91fe1 /drivers/gpu/nvgpu/gk20a
parent8c5ea40ccaad022401e45e61d5b6ff3354ffa413 (diff)
gpu: nvgpu: Convert VIDMEM work_struct to thread
Convert the work_struct used by the vidmem background clearing to a thread to make it more cross platform. The thread waits on a condition variable to determine when work needs to be done. The signal comes from the DMA API when it enqueues a new nvgpu_mem that needs clearing. Add logic for handling suspend: the CE cannot be accessed while the GPU is suspended. As such the background thread must be paused while the GPU is suspended and the CE is not available. Several other changes were also made: o Move the code that enqueues a nvgpu_mem from the DMA API code to a function in the VIDMEM code. o Move nvgpu_vidmem_get_pending_alloc() to the Linux specific code as this function is only used there. It's a trivial function that QNX can easily implement as well. o Remove the was_empty logic from the enqueue. Now just always signal the condition variable when anew nvgpu_mem comes in. o Move CE suspend to after MM suspend. JIRA NVGPU-30 JIRA NVGPU-138 Change-Id: Ie9286ae5a127c3fced86dfb9794e7d81eab0491c Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1574498 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.c7
-rw-r--r--drivers/gpu/nvgpu/gk20a/mm_gk20a.c4
-rw-r--r--drivers/gpu/nvgpu/gk20a/mm_gk20a.h8
3 files changed, 13 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c
index e1bf2b4b..02baf683 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.c
@@ -33,6 +33,7 @@
33#include <nvgpu/pmu.h> 33#include <nvgpu/pmu.h>
34#include <nvgpu/gmmu.h> 34#include <nvgpu/gmmu.h>
35#include <nvgpu/ltc.h> 35#include <nvgpu/ltc.h>
36#include <nvgpu/vidmem.h>
36 37
37#include <trace/events/gk20a.h> 38#include <trace/events/gk20a.h>
38 39
@@ -97,8 +98,6 @@ int gk20a_prepare_poweroff(struct gk20a *g)
97 if (gk20a_fifo_is_engine_busy(g)) 98 if (gk20a_fifo_is_engine_busy(g))
98 return -EBUSY; 99 return -EBUSY;
99 100
100 gk20a_ce_suspend(g);
101
102 ret = gk20a_channel_suspend(g); 101 ret = gk20a_channel_suspend(g);
103 if (ret) 102 if (ret)
104 return ret; 103 return ret;
@@ -111,6 +110,8 @@ int gk20a_prepare_poweroff(struct gk20a *g)
111 ret |= gk20a_mm_suspend(g); 110 ret |= gk20a_mm_suspend(g);
112 ret |= gk20a_fifo_suspend(g); 111 ret |= gk20a_fifo_suspend(g);
113 112
113 gk20a_ce_suspend(g);
114
114 /* Disable GPCPLL */ 115 /* Disable GPCPLL */
115 if (g->ops.clk.suspend_clk_support) 116 if (g->ops.clk.suspend_clk_support)
116 ret |= g->ops.clk.suspend_clk_support(g); 117 ret |= g->ops.clk.suspend_clk_support(g);
@@ -323,6 +324,8 @@ int gk20a_finalize_poweron(struct gk20a *g)
323 } 324 }
324 } 325 }
325 326
327 nvgpu_vidmem_thread_unpause(&g->mm);
328
326#if defined(CONFIG_TEGRA_GK20A_NVHOST) && defined(CONFIG_TEGRA_19x_GPU) 329#if defined(CONFIG_TEGRA_GK20A_NVHOST) && defined(CONFIG_TEGRA_19x_GPU)
327 if (gk20a_platform_has_syncpoints(g) && g->syncpt_unit_size) { 330 if (gk20a_platform_has_syncpoints(g) && g->syncpt_unit_size) {
328 if (!nvgpu_mem_is_valid(&g->syncpt_mem)) { 331 if (!nvgpu_mem_is_valid(&g->syncpt_mem)) {
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
index 687951a9..67ab307f 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
@@ -978,9 +978,7 @@ int gk20a_mm_suspend(struct gk20a *g)
978{ 978{
979 gk20a_dbg_fn(""); 979 gk20a_dbg_fn("");
980 980
981#if defined(CONFIG_GK20A_VIDMEM) 981 nvgpu_vidmem_thread_pause_sync(&g->mm);
982 cancel_work_sync(&g->mm.vidmem.clear_mem_worker);
983#endif
984 982
985 g->ops.mm.cbc_clean(g); 983 g->ops.mm.cbc_clean(g);
986 g->ops.mm.l2_flush(g, false); 984 g->ops.mm.l2_flush(g, false);
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
index 556cb234..13698cd7 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
@@ -36,6 +36,8 @@
36#include <nvgpu/rbtree.h> 36#include <nvgpu/rbtree.h>
37#include <nvgpu/kref.h> 37#include <nvgpu/kref.h>
38#include <nvgpu/atomic.h> 38#include <nvgpu/atomic.h>
39#include <nvgpu/cond.h>
40#include <nvgpu/thread.h>
39 41
40struct nvgpu_pd_cache; 42struct nvgpu_pd_cache;
41 43
@@ -272,7 +274,11 @@ struct mm_gk20a {
272 struct nvgpu_list_node clear_list_head; 274 struct nvgpu_list_node clear_list_head;
273 struct nvgpu_mutex clear_list_mutex; 275 struct nvgpu_mutex clear_list_mutex;
274 276
275 struct work_struct clear_mem_worker; 277 struct nvgpu_cond clearing_thread_cond;
278 struct nvgpu_thread clearing_thread;
279 struct nvgpu_mutex clearing_thread_lock;
280 nvgpu_atomic_t pause_count;
281
276 nvgpu_atomic64_t bytes_pending; 282 nvgpu_atomic64_t bytes_pending;
277 } vidmem; 283 } vidmem;
278}; 284};