diff options
author | Amulya <Amurthyreddy@nvidia.com> | 2018-08-17 07:29:52 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-08-21 17:54:51 -0400 |
commit | da43fc55606f40f27c0f823671bca16a979634cc (patch) | |
tree | 8c5a22b347ea1f76a2aa73baf66a22b607f218d6 /drivers/gpu/nvgpu/gk20a | |
parent | 05f45bcfc390c46f000f4c6b46546eebed869df6 (diff) |
gpu: nvgpu: MISRA 10.3-Conversions to/from an enum
Fix violations where the conversion is from a non-enum type to enum
type or vice-versa.
JIRA NVGPU-659
Change-Id: I45f43c907b810cc86b2a4480809d0c6757ed3486
Signed-off-by: Amulya <Amurthyreddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1802322
GVS: Gerrit_Virtual_Submit
Tested-by: Amulya Murthyreddy <amurthyreddy@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.h | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 5 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/mm_gk20a.h | 6 |
4 files changed, 10 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index fc6c9ad2..4628de4f 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -2720,7 +2720,7 @@ void gk20a_fifo_isr(struct gk20a *g) | |||
2720 | return; | 2720 | return; |
2721 | } | 2721 | } |
2722 | 2722 | ||
2723 | u32 gk20a_fifo_nonstall_isr(struct gk20a *g) | 2723 | enum gk20a_nonstall_ops gk20a_fifo_nonstall_isr(struct gk20a *g) |
2724 | { | 2724 | { |
2725 | u32 fifo_intr = gk20a_readl(g, fifo_intr_0_r()); | 2725 | u32 fifo_intr = gk20a_readl(g, fifo_intr_0_r()); |
2726 | u32 clear_intr = 0; | 2726 | u32 clear_intr = 0; |
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h index 77030c94..120950c1 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h | |||
@@ -31,6 +31,7 @@ | |||
31 | 31 | ||
32 | struct gk20a_debug_output; | 32 | struct gk20a_debug_output; |
33 | struct mmu_fault_info; | 33 | struct mmu_fault_info; |
34 | enum gk20a_nonstall_ops; | ||
34 | 35 | ||
35 | enum { | 36 | enum { |
36 | NVGPU_FIFO_RUNLIST_INTERLEAVE_LEVEL_LOW = 0, | 37 | NVGPU_FIFO_RUNLIST_INTERLEAVE_LEVEL_LOW = 0, |
@@ -228,7 +229,7 @@ int gk20a_init_fifo_support(struct gk20a *g); | |||
228 | int gk20a_init_fifo_setup_hw(struct gk20a *g); | 229 | int gk20a_init_fifo_setup_hw(struct gk20a *g); |
229 | 230 | ||
230 | void gk20a_fifo_isr(struct gk20a *g); | 231 | void gk20a_fifo_isr(struct gk20a *g); |
231 | u32 gk20a_fifo_nonstall_isr(struct gk20a *g); | 232 | enum gk20a_nonstall_ops gk20a_fifo_nonstall_isr(struct gk20a *g); |
232 | 233 | ||
233 | int gk20a_fifo_preempt_channel(struct gk20a *g, u32 chid); | 234 | int gk20a_fifo_preempt_channel(struct gk20a *g, u32 chid); |
234 | int gk20a_fifo_preempt_tsg(struct gk20a *g, u32 tsgid); | 235 | int gk20a_fifo_preempt_tsg(struct gk20a *g, u32 tsgid); |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index febd7e0c..262dbb2c 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -139,6 +139,7 @@ enum gk20a_cbc_op { | |||
139 | enum nvgpu_unit; | 139 | enum nvgpu_unit; |
140 | 140 | ||
141 | enum nvgpu_flush_op; | 141 | enum nvgpu_flush_op; |
142 | enum gk20a_mem_rw_flag; | ||
142 | 143 | ||
143 | struct _resmgr_context; | 144 | struct _resmgr_context; |
144 | struct nvgpu_gpfifo_entry; | 145 | struct nvgpu_gpfifo_entry; |
@@ -924,7 +925,7 @@ struct gpu_ops { | |||
924 | u8 kind_v, | 925 | u8 kind_v, |
925 | u32 ctag_offset, | 926 | u32 ctag_offset, |
926 | u32 flags, | 927 | u32 flags, |
927 | int rw_flag, | 928 | enum gk20a_mem_rw_flag rw_flag, |
928 | bool clear_ctags, | 929 | bool clear_ctags, |
929 | bool sparse, | 930 | bool sparse, |
930 | bool priv, | 931 | bool priv, |
@@ -935,7 +936,7 @@ struct gpu_ops { | |||
935 | u64 size, | 936 | u64 size, |
936 | int pgsz_idx, | 937 | int pgsz_idx, |
937 | bool va_allocated, | 938 | bool va_allocated, |
938 | int rw_flag, | 939 | enum gk20a_mem_rw_flag rw_flag, |
939 | bool sparse, | 940 | bool sparse, |
940 | struct vm_gk20a_mapping_batch *batch); | 941 | struct vm_gk20a_mapping_batch *batch); |
941 | int (*vm_bind_channel)(struct vm_gk20a *vm, | 942 | int (*vm_bind_channel)(struct vm_gk20a *vm, |
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h index 7b7c2ef7..b99603bb 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h | |||
@@ -30,6 +30,8 @@ | |||
30 | #include <nvgpu/rbtree.h> | 30 | #include <nvgpu/rbtree.h> |
31 | #include <nvgpu/kref.h> | 31 | #include <nvgpu/kref.h> |
32 | 32 | ||
33 | enum gk20a_mem_rw_flag; | ||
34 | |||
33 | struct gpfifo_desc { | 35 | struct gpfifo_desc { |
34 | struct nvgpu_mem mem; | 36 | struct nvgpu_mem mem; |
35 | u32 entry_num; | 37 | u32 entry_num; |
@@ -141,7 +143,7 @@ u64 gk20a_locked_gmmu_map(struct vm_gk20a *vm, | |||
141 | u8 kind_v, | 143 | u8 kind_v, |
142 | u32 ctag_offset, | 144 | u32 ctag_offset, |
143 | u32 flags, | 145 | u32 flags, |
144 | int rw_flag, | 146 | enum gk20a_mem_rw_flag rw_flag, |
145 | bool clear_ctags, | 147 | bool clear_ctags, |
146 | bool sparse, | 148 | bool sparse, |
147 | bool priv, | 149 | bool priv, |
@@ -153,7 +155,7 @@ void gk20a_locked_gmmu_unmap(struct vm_gk20a *vm, | |||
153 | u64 size, | 155 | u64 size, |
154 | int pgsz_idx, | 156 | int pgsz_idx, |
155 | bool va_allocated, | 157 | bool va_allocated, |
156 | int rw_flag, | 158 | enum gk20a_mem_rw_flag rw_flag, |
157 | bool sparse, | 159 | bool sparse, |
158 | struct vm_gk20a_mapping_batch *batch); | 160 | struct vm_gk20a_mapping_batch *batch); |
159 | 161 | ||