gpu: nvgpu: add secure gpccs boot support

bug 200080684

keeping it disabled by default
also trimming the code by removing redundant
variable to check recovery. pmu quick wait
now checks only for irqs which are serviced
by kernel. requests pmu to bit bang gpccs
ucode.

Change-Id: I12ef23d6d59b507e86a129b69eab65b21d0438c6
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/729622
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

3 files changed, 8 insertions, 5 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index ce8d1d62..67a6123e 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -377,15 +377,15 @@ struct gpu_ops {
                 int (*pmu_setup_hw_and_bootstrap)(struct gk20a *g);
                 int (*pmu_setup_elpg)(struct gk20a *g);
                 int (*init_wpr_region)(struct gk20a *g);
-                bool lspmuwprinitdone;
+                u32  lspmuwprinitdone;
                 bool fecsbootstrapdone;
-                u32  fecsrecoveryinprogress;
         } pmu;
         struct {
                 int (*init_clk_support)(struct gk20a *g);
                 int (*suspend_clk_support)(struct gk20a *g);
         } clk;
         bool privsecurity;
+        bool securegpccs;
         struct {
                 const struct regop_offset_range* (
                                 *get_global_whitelist_ranges)(void);
diff --git a/drivers/gpu/nvgpu/gk20a/hal_gk20a.c b/drivers/gpu/nvgpu/gk20a/hal_gk20a.c
index 5a9c38ea..b8268e1f 100644
--- a/drivers/gpu/nvgpu/gk20a/hal_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/hal_gk20a.c
@@ -52,6 +52,7 @@ int gk20a_init_hal(struct gk20a *g)
 
         *gops = gk20a_ops;
         gops->privsecurity = 0;
+        gops->securegpccs = 0;
         gk20a_init_mc(gops);
         gk20a_init_ltc(gops);
         gk20a_init_gr_ops(gops);
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
index 6313b9d5..2456c784 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
@@ -3333,12 +3333,16 @@ int pmu_wait_message_cond(struct pmu_gk20a *pmu, u32 timeout,
         struct gk20a *g = gk20a_from_pmu(pmu);
         unsigned long end_jiffies = jiffies + msecs_to_jiffies(timeout);
         unsigned long delay = GR_IDLE_CHECK_DEFAULT;
+        u32 servicedpmuint;
 
+        servicedpmuint = pwr_falcon_irqstat_halt_true_f() |
+                                pwr_falcon_irqstat_exterr_true_f() |
+                                pwr_falcon_irqstat_swgen0_true_f();
         do {
                 if (*var == val)
                         return 0;
 
-                if (gk20a_readl(g, pwr_falcon_irqstat_r()))
+                if (gk20a_readl(g, pwr_falcon_irqstat_r()) & servicedpmuint)
                         gk20a_pmu_isr(g);
 
                 usleep_range(delay, delay * 2);
@@ -4042,8 +4046,6 @@ int gk20a_pmu_destroy(struct gk20a *g)
         pmu->zbc_ready = false;
         g->ops.pmu.lspmuwprinitdone = false;
         g->ops.pmu.fecsbootstrapdone = false;
-        g->ops.pmu.fecsrecoveryinprogress = 0;
-
 
         gk20a_dbg_fn("done");
         return 0;