diff options
author | Deepak Nibade <dnibade@nvidia.com> | 2015-10-05 04:24:37 -0400 |
---|---|---|
committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2015-10-07 18:03:28 -0400 |
commit | d01a0249c40217236497728997b9c6ce8619acad (patch) | |
tree | 92872f27fc9e158ce294cc8ecf3737ce2d69eeb9 /drivers/gpu/nvgpu/gk20a | |
parent | 21508ec801ca32b58b48fe2fba039bfcb37ed206 (diff) |
gpu: nvgpu: cancel all wdt timeouts while handling SCHED errors
A SCHED error might cause multiple channels' watchdogs to trigger
simultaneously
Hence, to avoid this conflict cancel watchdog timeout on all
channels before recovering from SCHED errors
Also, define API gk20a_channel_timeout_stop_all_channels()
to cancel wdt timeout on all channels
Bug 200133289
Change-Id: I8324c397891f0a711327b77d0677cd6718af6d01
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/810959
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/channel_gk20a.c | 15 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/channel_gk20a.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 6 |
3 files changed, 22 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c index e6a39b20..92b4b3de 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c | |||
@@ -1573,6 +1573,21 @@ static void gk20a_channel_timeout_stop(struct channel_gk20a *ch) | |||
1573 | mutex_unlock(&ch->timeout.lock); | 1573 | mutex_unlock(&ch->timeout.lock); |
1574 | } | 1574 | } |
1575 | 1575 | ||
1576 | void gk20a_channel_timeout_stop_all_channels(struct gk20a *g) | ||
1577 | { | ||
1578 | u32 chid; | ||
1579 | struct fifo_gk20a *f = &g->fifo; | ||
1580 | |||
1581 | for (chid = 0; chid < f->num_channels; chid++) { | ||
1582 | struct channel_gk20a *ch = &f->channel[chid]; | ||
1583 | |||
1584 | if (gk20a_channel_get(ch)) { | ||
1585 | gk20a_channel_timeout_stop(ch); | ||
1586 | gk20a_channel_put(ch); | ||
1587 | } | ||
1588 | } | ||
1589 | } | ||
1590 | |||
1576 | static void gk20a_channel_timeout_handler(struct work_struct *work) | 1591 | static void gk20a_channel_timeout_handler(struct work_struct *work) |
1577 | { | 1592 | { |
1578 | struct channel_gk20a_job *job; | 1593 | struct channel_gk20a_job *job; |
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h index 20600207..280c50b1 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h | |||
@@ -256,4 +256,5 @@ void channel_gk20a_free_inst(struct gk20a *g, struct channel_gk20a *ch); | |||
256 | int channel_gk20a_setup_ramfc(struct channel_gk20a *c, | 256 | int channel_gk20a_setup_ramfc(struct channel_gk20a *c, |
257 | u64 gpfifo_base, u32 gpfifo_entries, u32 flags); | 257 | u64 gpfifo_base, u32 gpfifo_entries, u32 flags); |
258 | void channel_gk20a_enable(struct channel_gk20a *ch); | 258 | void channel_gk20a_enable(struct channel_gk20a *ch); |
259 | void gk20a_channel_timeout_stop_all_channels(struct gk20a *g); | ||
259 | #endif /* CHANNEL_GK20A_H */ | 260 | #endif /* CHANNEL_GK20A_H */ |
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index ae36478e..4f3363f2 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -1450,6 +1450,7 @@ static bool gk20a_fifo_handle_sched_error(struct gk20a *g) | |||
1450 | struct channel_gk20a *ch = &f->channel[id]; | 1450 | struct channel_gk20a *ch = &f->channel[id]; |
1451 | 1451 | ||
1452 | if (is_tsg) { | 1452 | if (is_tsg) { |
1453 | gk20a_channel_timeout_stop_all_channels(g); | ||
1453 | gk20a_fifo_recover(g, BIT(engine_id), id, true, | 1454 | gk20a_fifo_recover(g, BIT(engine_id), id, true, |
1454 | true, true); | 1455 | true, true); |
1455 | ret = true; | 1456 | ret = true; |
@@ -1467,6 +1468,11 @@ static bool gk20a_fifo_handle_sched_error(struct gk20a *g) | |||
1467 | "fifo sched ctxsw timeout error:" | 1468 | "fifo sched ctxsw timeout error:" |
1468 | "engine = %u, ch = %d", engine_id, id); | 1469 | "engine = %u, ch = %d", engine_id, id); |
1469 | gk20a_gr_debug_dump(g->dev); | 1470 | gk20a_gr_debug_dump(g->dev); |
1471 | /* | ||
1472 | * Cancel all channels' timeout since SCHED error might | ||
1473 | * trigger multiple watchdogs at a time | ||
1474 | */ | ||
1475 | gk20a_channel_timeout_stop_all_channels(g); | ||
1470 | gk20a_fifo_recover(g, BIT(engine_id), id, false, | 1476 | gk20a_fifo_recover(g, BIT(engine_id), id, false, |
1471 | true, ch->timeout_debug_dump); | 1477 | true, ch->timeout_debug_dump); |
1472 | ret = true; | 1478 | ret = true; |