diff options
author | Alex Waterman <alexw@nvidia.com> | 2017-05-09 21:34:54 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-06-06 20:09:16 -0400 |
commit | c21f5bca9ae81804130e30ea3e6f7a18d51203dc (patch) | |
tree | fb1a2d67532df19d70468610ad2a62c3464876c1 /drivers/gpu/nvgpu/gk20a | |
parent | c2b63150cd947557b8d17637258b988459b8e0ec (diff) |
gpu: nvgpu: Remove extraneous VM init/deinit APIs
Support only VM pointers and ref-counting for maintaining VMs. This
dramatically reduces the complexity of the APIs, avoids the API
abuse that has existed, and ensures that future VM usage is
consistent with current usage.
Also remove the combined VM free/instance block deletion. Any place
where this was done is now replaced with an explict free of the
instance block and a nvgpu_vm_put().
JIRA NVGPU-12
JIRA NVGPU-30
Change-Id: Ib73e8d574ecc9abf6dad0b40a2c5795d6396cc8c
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1480227
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/cde_gk20a.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/ce2_gk20a.c | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/css_gr_gk20a.c | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c | 21 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.c | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/mm_gk20a.c | 97 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/mm_gk20a.h | 14 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | 8 |
10 files changed, 87 insertions, 81 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/cde_gk20a.c b/drivers/gpu/nvgpu/gk20a/cde_gk20a.c index 084f1793..730ffe5c 100644 --- a/drivers/gpu/nvgpu/gk20a/cde_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/cde_gk20a.c | |||
@@ -1230,7 +1230,7 @@ static int gk20a_cde_load(struct gk20a_cde_ctx *cde_ctx) | |||
1230 | } | 1230 | } |
1231 | 1231 | ||
1232 | /* bind the channel to the vm */ | 1232 | /* bind the channel to the vm */ |
1233 | err = __gk20a_vm_bind_channel(&g->mm.cde.vm, ch); | 1233 | err = __gk20a_vm_bind_channel(g->mm.cde.vm, ch); |
1234 | if (err) { | 1234 | if (err) { |
1235 | nvgpu_warn(g, "cde: could not bind vm"); | 1235 | nvgpu_warn(g, "cde: could not bind vm"); |
1236 | goto err_commit_va; | 1236 | goto err_commit_va; |
diff --git a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c index c905bedb..8e600c18 100644 --- a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c | |||
@@ -451,7 +451,7 @@ u32 gk20a_ce_create_context_with_cb(struct gk20a *g, | |||
451 | ce_ctx->submitted_seq_number = 0; | 451 | ce_ctx->submitted_seq_number = 0; |
452 | ce_ctx->completed_seq_number = 0; | 452 | ce_ctx->completed_seq_number = 0; |
453 | 453 | ||
454 | ce_ctx->vm = &g->mm.ce.vm; | 454 | ce_ctx->vm = g->mm.ce.vm; |
455 | 455 | ||
456 | /* always kernel client needs privileged channel */ | 456 | /* always kernel client needs privileged channel */ |
457 | ce_ctx->ch = gk20a_open_new_channel_with_cb(g, gk20a_ce_finished_ctx_cb, | 457 | ce_ctx->ch = gk20a_open_new_channel_with_cb(g, gk20a_ce_finished_ctx_cb, |
@@ -465,7 +465,7 @@ u32 gk20a_ce_create_context_with_cb(struct gk20a *g, | |||
465 | ce_ctx->ch->wdt_enabled = false; | 465 | ce_ctx->ch->wdt_enabled = false; |
466 | 466 | ||
467 | /* bind the channel to the vm */ | 467 | /* bind the channel to the vm */ |
468 | err = __gk20a_vm_bind_channel(&g->mm.ce.vm, ce_ctx->ch); | 468 | err = __gk20a_vm_bind_channel(g->mm.ce.vm, ce_ctx->ch); |
469 | if (err) { | 469 | if (err) { |
470 | nvgpu_err(g, "ce: could not bind vm"); | 470 | nvgpu_err(g, "ce: could not bind vm"); |
471 | goto end; | 471 | goto end; |
diff --git a/drivers/gpu/nvgpu/gk20a/css_gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/css_gr_gk20a.c index f5176e98..452bcd11 100644 --- a/drivers/gpu/nvgpu/gk20a/css_gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/css_gr_gk20a.c | |||
@@ -146,7 +146,7 @@ static int css_hw_enable_snapshot(struct channel_gk20a *ch, | |||
146 | if (snapshot_size < CSS_MIN_HW_SNAPSHOT_SIZE) | 146 | if (snapshot_size < CSS_MIN_HW_SNAPSHOT_SIZE) |
147 | snapshot_size = CSS_MIN_HW_SNAPSHOT_SIZE; | 147 | snapshot_size = CSS_MIN_HW_SNAPSHOT_SIZE; |
148 | 148 | ||
149 | ret = nvgpu_dma_alloc_map_sys(&g->mm.pmu.vm, snapshot_size, | 149 | ret = nvgpu_dma_alloc_map_sys(g->mm.pmu.vm, snapshot_size, |
150 | &data->hw_memdesc); | 150 | &data->hw_memdesc); |
151 | if (ret) | 151 | if (ret) |
152 | return ret; | 152 | return ret; |
@@ -195,7 +195,7 @@ static int css_hw_enable_snapshot(struct channel_gk20a *ch, | |||
195 | 195 | ||
196 | failed_allocation: | 196 | failed_allocation: |
197 | if (data->hw_memdesc.size) { | 197 | if (data->hw_memdesc.size) { |
198 | nvgpu_dma_unmap_free(&g->mm.pmu.vm, &data->hw_memdesc); | 198 | nvgpu_dma_unmap_free(g->mm.pmu.vm, &data->hw_memdesc); |
199 | memset(&data->hw_memdesc, 0, sizeof(data->hw_memdesc)); | 199 | memset(&data->hw_memdesc, 0, sizeof(data->hw_memdesc)); |
200 | } | 200 | } |
201 | data->hw_snapshot = NULL; | 201 | data->hw_snapshot = NULL; |
@@ -223,7 +223,7 @@ static void css_hw_disable_snapshot(struct gr_gk20a *gr) | |||
223 | perf_pmasys_mem_block_valid_false_f() | | 223 | perf_pmasys_mem_block_valid_false_f() | |
224 | perf_pmasys_mem_block_target_f(0)); | 224 | perf_pmasys_mem_block_target_f(0)); |
225 | 225 | ||
226 | nvgpu_dma_unmap_free(&g->mm.pmu.vm, &data->hw_memdesc); | 226 | nvgpu_dma_unmap_free(g->mm.pmu.vm, &data->hw_memdesc); |
227 | memset(&data->hw_memdesc, 0, sizeof(data->hw_memdesc)); | 227 | memset(&data->hw_memdesc, 0, sizeof(data->hw_memdesc)); |
228 | data->hw_snapshot = NULL; | 228 | data->hw_snapshot = NULL; |
229 | 229 | ||
diff --git a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c index 09268b6b..4bfa041e 100644 --- a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c | |||
@@ -1838,7 +1838,6 @@ static int gk20a_perfbuf_map(struct dbg_session_gk20a *dbg_s, | |||
1838 | { | 1838 | { |
1839 | struct gk20a *g = dbg_s->g; | 1839 | struct gk20a *g = dbg_s->g; |
1840 | struct mm_gk20a *mm = &g->mm; | 1840 | struct mm_gk20a *mm = &g->mm; |
1841 | struct vm_gk20a *vm = &mm->perfbuf.vm; | ||
1842 | int err; | 1841 | int err; |
1843 | u32 virt_size; | 1842 | u32 virt_size; |
1844 | u32 virt_addr_lo; | 1843 | u32 virt_addr_lo; |
@@ -1853,23 +1852,23 @@ static int gk20a_perfbuf_map(struct dbg_session_gk20a *dbg_s, | |||
1853 | return -EBUSY; | 1852 | return -EBUSY; |
1854 | } | 1853 | } |
1855 | 1854 | ||
1856 | err = nvgpu_init_vm(mm, vm, big_page_size, | 1855 | mm->perfbuf.vm = nvgpu_vm_init(g, big_page_size, |
1857 | big_page_size << 10, | 1856 | big_page_size << 10, |
1858 | NV_MM_DEFAULT_KERNEL_SIZE, | 1857 | NV_MM_DEFAULT_KERNEL_SIZE, |
1859 | NV_MM_DEFAULT_KERNEL_SIZE + NV_MM_DEFAULT_USER_SIZE, | 1858 | NV_MM_DEFAULT_KERNEL_SIZE + NV_MM_DEFAULT_USER_SIZE, |
1860 | false, false, "perfbuf"); | 1859 | false, false, "perfbuf"); |
1861 | if (err) { | 1860 | if (!mm->perfbuf.vm) { |
1862 | nvgpu_mutex_release(&g->dbg_sessions_lock); | 1861 | nvgpu_mutex_release(&g->dbg_sessions_lock); |
1863 | return err; | 1862 | return -ENOMEM; |
1864 | } | 1863 | } |
1865 | 1864 | ||
1866 | err = gk20a_alloc_inst_block(g, &mm->perfbuf.inst_block); | 1865 | err = gk20a_alloc_inst_block(g, &mm->perfbuf.inst_block); |
1867 | if (err) | 1866 | if (err) |
1868 | goto err_remove_vm; | 1867 | goto err_remove_vm; |
1869 | 1868 | ||
1870 | g->ops.mm.init_inst_block(&mm->perfbuf.inst_block, vm, 0); | 1869 | g->ops.mm.init_inst_block(&mm->perfbuf.inst_block, mm->perfbuf.vm, 0); |
1871 | 1870 | ||
1872 | err = nvgpu_vm_map_buffer(vm, | 1871 | err = nvgpu_vm_map_buffer(mm->perfbuf.vm, |
1873 | args->dmabuf_fd, | 1872 | args->dmabuf_fd, |
1874 | &args->offset, | 1873 | &args->offset, |
1875 | 0, | 1874 | 0, |
@@ -1922,9 +1921,10 @@ static int gk20a_perfbuf_map(struct dbg_session_gk20a *dbg_s, | |||
1922 | return 0; | 1921 | return 0; |
1923 | 1922 | ||
1924 | err_unmap: | 1923 | err_unmap: |
1925 | nvgpu_vm_unmap_buffer(vm, args->offset, NULL); | 1924 | nvgpu_vm_unmap_buffer(mm->perfbuf.vm, args->offset, NULL); |
1926 | err_remove_vm: | 1925 | err_remove_vm: |
1927 | nvgpu_vm_remove_inst(vm, &mm->perfbuf.inst_block); | 1926 | gk20a_free_inst_block(g, &mm->perfbuf.inst_block); |
1927 | nvgpu_vm_put(mm->perfbuf.vm); | ||
1928 | nvgpu_mutex_release(&g->dbg_sessions_lock); | 1928 | nvgpu_mutex_release(&g->dbg_sessions_lock); |
1929 | return err; | 1929 | return err; |
1930 | } | 1930 | } |
@@ -1956,13 +1956,14 @@ static int gk20a_perfbuf_disable_locked(struct gk20a *g) | |||
1956 | static int gk20a_perfbuf_release_locked(struct gk20a *g, u64 offset) | 1956 | static int gk20a_perfbuf_release_locked(struct gk20a *g, u64 offset) |
1957 | { | 1957 | { |
1958 | struct mm_gk20a *mm = &g->mm; | 1958 | struct mm_gk20a *mm = &g->mm; |
1959 | struct vm_gk20a *vm = &mm->perfbuf.vm; | 1959 | struct vm_gk20a *vm = mm->perfbuf.vm; |
1960 | int err; | 1960 | int err; |
1961 | 1961 | ||
1962 | err = gk20a_perfbuf_disable_locked(g); | 1962 | err = gk20a_perfbuf_disable_locked(g); |
1963 | 1963 | ||
1964 | nvgpu_vm_unmap_buffer(vm, offset, NULL); | 1964 | nvgpu_vm_unmap_buffer(vm, offset, NULL); |
1965 | nvgpu_vm_remove_inst(vm, &mm->perfbuf.inst_block); | 1965 | gk20a_free_inst_block(g, &mm->perfbuf.inst_block); |
1966 | nvgpu_vm_put(vm); | ||
1966 | 1967 | ||
1967 | g->perfbuf.owner = NULL; | 1968 | g->perfbuf.owner = NULL; |
1968 | g->perfbuf.offset = 0; | 1969 | g->perfbuf.offset = 0; |
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 63896228..7eb28f2f 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -541,7 +541,7 @@ static void gk20a_remove_fifo_support(struct fifo_gk20a *f) | |||
541 | nvgpu_vfree(g, f->channel); | 541 | nvgpu_vfree(g, f->channel); |
542 | nvgpu_vfree(g, f->tsg); | 542 | nvgpu_vfree(g, f->tsg); |
543 | if (g->ops.mm.is_bar1_supported(g)) | 543 | if (g->ops.mm.is_bar1_supported(g)) |
544 | nvgpu_dma_unmap_free(&g->mm.bar1.vm, &f->userd); | 544 | nvgpu_dma_unmap_free(g->mm.bar1.vm, &f->userd); |
545 | else | 545 | else |
546 | nvgpu_dma_free(g, &f->userd); | 546 | nvgpu_dma_free(g, &f->userd); |
547 | 547 | ||
@@ -923,7 +923,7 @@ static int gk20a_init_fifo_setup_sw(struct gk20a *g) | |||
923 | nvgpu_mutex_init(&f->free_chs_mutex); | 923 | nvgpu_mutex_init(&f->free_chs_mutex); |
924 | 924 | ||
925 | if (g->ops.mm.is_bar1_supported(g)) | 925 | if (g->ops.mm.is_bar1_supported(g)) |
926 | err = nvgpu_dma_alloc_map_sys(&g->mm.bar1.vm, | 926 | err = nvgpu_dma_alloc_map_sys(g->mm.bar1.vm, |
927 | f->userd_entry_size * f->num_channels, | 927 | f->userd_entry_size * f->num_channels, |
928 | &f->userd); | 928 | &f->userd); |
929 | 929 | ||
@@ -963,7 +963,7 @@ static int gk20a_init_fifo_setup_sw(struct gk20a *g) | |||
963 | clean_up: | 963 | clean_up: |
964 | gk20a_dbg_fn("fail"); | 964 | gk20a_dbg_fn("fail"); |
965 | if (g->ops.mm.is_bar1_supported(g)) | 965 | if (g->ops.mm.is_bar1_supported(g)) |
966 | nvgpu_dma_unmap_free(&g->mm.bar1.vm, &f->userd); | 966 | nvgpu_dma_unmap_free(g->mm.bar1.vm, &f->userd); |
967 | else | 967 | else |
968 | nvgpu_dma_free(g, &f->userd); | 968 | nvgpu_dma_free(g, &f->userd); |
969 | 969 | ||
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c index 31b0a771..e4d454fe 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gk20a.c | |||
@@ -436,10 +436,10 @@ int gk20a_init_gpu_characteristics(struct gk20a *g) | |||
436 | 436 | ||
437 | gpu->bus_type = NVGPU_GPU_BUS_TYPE_AXI; /* always AXI for now */ | 437 | gpu->bus_type = NVGPU_GPU_BUS_TYPE_AXI; /* always AXI for now */ |
438 | 438 | ||
439 | gpu->big_page_size = g->mm.pmu.vm.big_page_size; | ||
440 | gpu->compression_page_size = g->ops.fb.compression_page_size(g); | 439 | gpu->compression_page_size = g->ops.fb.compression_page_size(g); |
440 | gpu->big_page_size = platform->default_big_page_size; | ||
441 | gpu->pde_coverage_bit_count = | 441 | gpu->pde_coverage_bit_count = |
442 | gk20a_mm_pde_coverage_bit_count(&g->mm.pmu.vm); | 442 | g->ops.mm.get_mmu_levels(g, gpu->big_page_size)[0].lo_bit[0]; |
443 | 443 | ||
444 | if (g->mm.disable_bigpage) { | 444 | if (g->mm.disable_bigpage) { |
445 | gpu->big_page_size = 0; | 445 | gpu->big_page_size = 0; |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index f8e05818..b2ae77c3 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -2191,7 +2191,7 @@ static void gr_gk20a_start_falcon_ucode(struct gk20a *g) | |||
2191 | static int gr_gk20a_init_ctxsw_ucode_vaspace(struct gk20a *g) | 2191 | static int gr_gk20a_init_ctxsw_ucode_vaspace(struct gk20a *g) |
2192 | { | 2192 | { |
2193 | struct mm_gk20a *mm = &g->mm; | 2193 | struct mm_gk20a *mm = &g->mm; |
2194 | struct vm_gk20a *vm = &mm->pmu.vm; | 2194 | struct vm_gk20a *vm = mm->pmu.vm; |
2195 | struct gk20a_ctxsw_ucode_info *ucode_info = &g->ctxsw_ucode_info; | 2195 | struct gk20a_ctxsw_ucode_info *ucode_info = &g->ctxsw_ucode_info; |
2196 | int err; | 2196 | int err; |
2197 | 2197 | ||
@@ -2265,7 +2265,7 @@ static int gr_gk20a_copy_ctxsw_ucode_segments( | |||
2265 | int gr_gk20a_init_ctxsw_ucode(struct gk20a *g) | 2265 | int gr_gk20a_init_ctxsw_ucode(struct gk20a *g) |
2266 | { | 2266 | { |
2267 | struct mm_gk20a *mm = &g->mm; | 2267 | struct mm_gk20a *mm = &g->mm; |
2268 | struct vm_gk20a *vm = &mm->pmu.vm; | 2268 | struct vm_gk20a *vm = mm->pmu.vm; |
2269 | struct gk20a_ctxsw_bootloader_desc *fecs_boot_desc; | 2269 | struct gk20a_ctxsw_bootloader_desc *fecs_boot_desc; |
2270 | struct gk20a_ctxsw_bootloader_desc *gpccs_boot_desc; | 2270 | struct gk20a_ctxsw_bootloader_desc *gpccs_boot_desc; |
2271 | struct nvgpu_firmware *fecs_fw; | 2271 | struct nvgpu_firmware *fecs_fw; |
@@ -5195,7 +5195,7 @@ static int gk20a_init_gr_bind_fecs_elpg(struct gk20a *g) | |||
5195 | { | 5195 | { |
5196 | struct nvgpu_pmu *pmu = &g->pmu; | 5196 | struct nvgpu_pmu *pmu = &g->pmu; |
5197 | struct mm_gk20a *mm = &g->mm; | 5197 | struct mm_gk20a *mm = &g->mm; |
5198 | struct vm_gk20a *vm = &mm->pmu.vm; | 5198 | struct vm_gk20a *vm = mm->pmu.vm; |
5199 | int err = 0; | 5199 | int err = 0; |
5200 | 5200 | ||
5201 | u32 size; | 5201 | u32 size; |
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c index 87e6f30c..a1873a30 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c | |||
@@ -465,8 +465,7 @@ static void gk20a_remove_mm_ce_support(struct mm_gk20a *mm) | |||
465 | 465 | ||
466 | mm->vidmem.ce_ctx_id = (u32)~0; | 466 | mm->vidmem.ce_ctx_id = (u32)~0; |
467 | 467 | ||
468 | __nvgpu_vm_remove(&mm->ce.vm); | 468 | nvgpu_vm_put(mm->ce.vm); |
469 | |||
470 | } | 469 | } |
471 | 470 | ||
472 | static void gk20a_remove_mm_support(struct mm_gk20a *mm) | 471 | static void gk20a_remove_mm_support(struct mm_gk20a *mm) |
@@ -476,12 +475,15 @@ static void gk20a_remove_mm_support(struct mm_gk20a *mm) | |||
476 | if (g->ops.mm.remove_bar2_vm) | 475 | if (g->ops.mm.remove_bar2_vm) |
477 | g->ops.mm.remove_bar2_vm(g); | 476 | g->ops.mm.remove_bar2_vm(g); |
478 | 477 | ||
479 | if (g->ops.mm.is_bar1_supported(g)) | 478 | if (g->ops.mm.is_bar1_supported(g)) { |
480 | nvgpu_vm_remove_inst(&mm->bar1.vm, &mm->bar1.inst_block); | 479 | gk20a_free_inst_block(g, &mm->bar1.inst_block); |
480 | nvgpu_vm_put(mm->bar1.vm); | ||
481 | } | ||
481 | 482 | ||
482 | nvgpu_vm_remove_inst(&mm->pmu.vm, &mm->pmu.inst_block); | 483 | gk20a_free_inst_block(g, &mm->pmu.inst_block); |
483 | gk20a_free_inst_block(gk20a_from_mm(mm), &mm->hwpm.inst_block); | 484 | gk20a_free_inst_block(g, &mm->hwpm.inst_block); |
484 | __nvgpu_vm_remove(&mm->cde.vm); | 485 | nvgpu_vm_put(mm->pmu.vm); |
486 | nvgpu_vm_put(mm->cde.vm); | ||
485 | 487 | ||
486 | gk20a_semaphore_sea_destroy(g); | 488 | gk20a_semaphore_sea_destroy(g); |
487 | gk20a_vidmem_destroy(g); | 489 | gk20a_vidmem_destroy(g); |
@@ -2641,30 +2643,31 @@ u64 gk20a_mm_inst_block_addr(struct gk20a *g, struct nvgpu_mem *inst_block) | |||
2641 | static int gk20a_init_bar1_vm(struct mm_gk20a *mm) | 2643 | static int gk20a_init_bar1_vm(struct mm_gk20a *mm) |
2642 | { | 2644 | { |
2643 | int err; | 2645 | int err; |
2644 | struct vm_gk20a *vm = &mm->bar1.vm; | ||
2645 | struct gk20a *g = gk20a_from_mm(mm); | 2646 | struct gk20a *g = gk20a_from_mm(mm); |
2646 | struct nvgpu_mem *inst_block = &mm->bar1.inst_block; | 2647 | struct nvgpu_mem *inst_block = &mm->bar1.inst_block; |
2647 | u32 big_page_size = gk20a_get_platform(g->dev)->default_big_page_size; | 2648 | u32 big_page_size = gk20a_get_platform(g->dev)->default_big_page_size; |
2648 | 2649 | ||
2649 | mm->bar1.aperture_size = bar1_aperture_size_mb_gk20a() << 20; | 2650 | mm->bar1.aperture_size = bar1_aperture_size_mb_gk20a() << 20; |
2650 | gk20a_dbg_info("bar1 vm size = 0x%x", mm->bar1.aperture_size); | 2651 | gk20a_dbg_info("bar1 vm size = 0x%x", mm->bar1.aperture_size); |
2651 | nvgpu_init_vm(mm, vm, | 2652 | mm->bar1.vm = nvgpu_vm_init(g, |
2652 | big_page_size, | 2653 | big_page_size, |
2653 | SZ_4K, /* Low hole */ | 2654 | SZ_4K, |
2654 | mm->bar1.aperture_size - SZ_4K, /* Kernel reserved. */ | 2655 | mm->bar1.aperture_size - SZ_4K, |
2655 | mm->bar1.aperture_size, | 2656 | mm->bar1.aperture_size, |
2656 | true, false, | 2657 | true, false, |
2657 | "bar1"); | 2658 | "bar1"); |
2659 | if (!mm->bar1.vm) | ||
2660 | return -ENOMEM; | ||
2658 | 2661 | ||
2659 | err = gk20a_alloc_inst_block(g, inst_block); | 2662 | err = gk20a_alloc_inst_block(g, inst_block); |
2660 | if (err) | 2663 | if (err) |
2661 | goto clean_up_va; | 2664 | goto clean_up_vm; |
2662 | g->ops.mm.init_inst_block(inst_block, vm, big_page_size); | 2665 | g->ops.mm.init_inst_block(inst_block, mm->bar1.vm, big_page_size); |
2663 | 2666 | ||
2664 | return 0; | 2667 | return 0; |
2665 | 2668 | ||
2666 | clean_up_va: | 2669 | clean_up_vm: |
2667 | nvgpu_deinit_vm(vm); | 2670 | nvgpu_vm_put(mm->bar1.vm); |
2668 | return err; | 2671 | return err; |
2669 | } | 2672 | } |
2670 | 2673 | ||
@@ -2672,7 +2675,6 @@ clean_up_va: | |||
2672 | static int gk20a_init_system_vm(struct mm_gk20a *mm) | 2675 | static int gk20a_init_system_vm(struct mm_gk20a *mm) |
2673 | { | 2676 | { |
2674 | int err; | 2677 | int err; |
2675 | struct vm_gk20a *vm = &mm->pmu.vm; | ||
2676 | struct gk20a *g = gk20a_from_mm(mm); | 2678 | struct gk20a *g = gk20a_from_mm(mm); |
2677 | struct nvgpu_mem *inst_block = &mm->pmu.inst_block; | 2679 | struct nvgpu_mem *inst_block = &mm->pmu.inst_block; |
2678 | u32 big_page_size = gk20a_get_platform(g->dev)->default_big_page_size; | 2680 | u32 big_page_size = gk20a_get_platform(g->dev)->default_big_page_size; |
@@ -2687,65 +2689,70 @@ static int gk20a_init_system_vm(struct mm_gk20a *mm) | |||
2687 | mm->pmu.aperture_size = GK20A_PMU_VA_SIZE; | 2689 | mm->pmu.aperture_size = GK20A_PMU_VA_SIZE; |
2688 | gk20a_dbg_info("pmu vm size = 0x%x", mm->pmu.aperture_size); | 2690 | gk20a_dbg_info("pmu vm size = 0x%x", mm->pmu.aperture_size); |
2689 | 2691 | ||
2690 | nvgpu_init_vm(mm, vm, big_page_size, | 2692 | mm->pmu.vm = nvgpu_vm_init(g, big_page_size, |
2691 | low_hole, | 2693 | low_hole, |
2692 | aperture_size - low_hole, | 2694 | aperture_size - low_hole, |
2693 | aperture_size, | 2695 | aperture_size, |
2694 | true, | 2696 | true, |
2695 | false, | 2697 | false, |
2696 | "system"); | 2698 | "system"); |
2699 | if (!mm->pmu.vm) | ||
2700 | return -ENOMEM; | ||
2697 | 2701 | ||
2698 | err = gk20a_alloc_inst_block(g, inst_block); | 2702 | err = gk20a_alloc_inst_block(g, inst_block); |
2699 | if (err) | 2703 | if (err) |
2700 | goto clean_up_va; | 2704 | goto clean_up_vm; |
2701 | g->ops.mm.init_inst_block(inst_block, vm, big_page_size); | 2705 | g->ops.mm.init_inst_block(inst_block, mm->pmu.vm, big_page_size); |
2702 | 2706 | ||
2703 | return 0; | 2707 | return 0; |
2704 | 2708 | ||
2705 | clean_up_va: | 2709 | clean_up_vm: |
2706 | nvgpu_deinit_vm(vm); | 2710 | nvgpu_vm_put(mm->pmu.vm); |
2707 | return err; | 2711 | return err; |
2708 | } | 2712 | } |
2709 | 2713 | ||
2710 | static int gk20a_init_hwpm(struct mm_gk20a *mm) | 2714 | static int gk20a_init_hwpm(struct mm_gk20a *mm) |
2711 | { | 2715 | { |
2712 | int err; | 2716 | int err; |
2713 | struct vm_gk20a *vm = &mm->pmu.vm; | ||
2714 | struct gk20a *g = gk20a_from_mm(mm); | 2717 | struct gk20a *g = gk20a_from_mm(mm); |
2715 | struct nvgpu_mem *inst_block = &mm->hwpm.inst_block; | 2718 | struct nvgpu_mem *inst_block = &mm->hwpm.inst_block; |
2716 | 2719 | ||
2717 | err = gk20a_alloc_inst_block(g, inst_block); | 2720 | err = gk20a_alloc_inst_block(g, inst_block); |
2718 | if (err) | 2721 | if (err) |
2719 | return err; | 2722 | return err; |
2720 | g->ops.mm.init_inst_block(inst_block, vm, 0); | 2723 | g->ops.mm.init_inst_block(inst_block, mm->pmu.vm, 0); |
2721 | 2724 | ||
2722 | return 0; | 2725 | return 0; |
2723 | } | 2726 | } |
2724 | 2727 | ||
2725 | static int gk20a_init_cde_vm(struct mm_gk20a *mm) | 2728 | static int gk20a_init_cde_vm(struct mm_gk20a *mm) |
2726 | { | 2729 | { |
2727 | struct vm_gk20a *vm = &mm->cde.vm; | ||
2728 | struct gk20a *g = gk20a_from_mm(mm); | 2730 | struct gk20a *g = gk20a_from_mm(mm); |
2729 | u32 big_page_size = gk20a_get_platform(g->dev)->default_big_page_size; | 2731 | u32 big_page_size = gk20a_get_platform(g->dev)->default_big_page_size; |
2730 | 2732 | ||
2731 | return nvgpu_init_vm(mm, vm, big_page_size, | 2733 | mm->cde.vm = nvgpu_vm_init(g, big_page_size, |
2732 | big_page_size << 10, | 2734 | big_page_size << 10, |
2733 | NV_MM_DEFAULT_KERNEL_SIZE, | 2735 | NV_MM_DEFAULT_KERNEL_SIZE, |
2734 | NV_MM_DEFAULT_KERNEL_SIZE + NV_MM_DEFAULT_USER_SIZE, | 2736 | NV_MM_DEFAULT_KERNEL_SIZE + NV_MM_DEFAULT_USER_SIZE, |
2735 | false, false, "cde"); | 2737 | false, false, "cde"); |
2738 | if (!mm->cde.vm) | ||
2739 | return -ENOMEM; | ||
2740 | return 0; | ||
2736 | } | 2741 | } |
2737 | 2742 | ||
2738 | static int gk20a_init_ce_vm(struct mm_gk20a *mm) | 2743 | static int gk20a_init_ce_vm(struct mm_gk20a *mm) |
2739 | { | 2744 | { |
2740 | struct vm_gk20a *vm = &mm->ce.vm; | ||
2741 | struct gk20a *g = gk20a_from_mm(mm); | 2745 | struct gk20a *g = gk20a_from_mm(mm); |
2742 | u32 big_page_size = gk20a_get_platform(g->dev)->default_big_page_size; | 2746 | u32 big_page_size = gk20a_get_platform(g->dev)->default_big_page_size; |
2743 | 2747 | ||
2744 | return nvgpu_init_vm(mm, vm, big_page_size, | 2748 | mm->ce.vm = nvgpu_vm_init(g, big_page_size, |
2745 | big_page_size << 10, | 2749 | big_page_size << 10, |
2746 | NV_MM_DEFAULT_KERNEL_SIZE, | 2750 | NV_MM_DEFAULT_KERNEL_SIZE, |
2747 | NV_MM_DEFAULT_KERNEL_SIZE + NV_MM_DEFAULT_USER_SIZE, | 2751 | NV_MM_DEFAULT_KERNEL_SIZE + NV_MM_DEFAULT_USER_SIZE, |
2748 | false, false, "ce"); | 2752 | false, false, "ce"); |
2753 | if (!mm->ce.vm) | ||
2754 | return -ENOMEM; | ||
2755 | return 0; | ||
2749 | } | 2756 | } |
2750 | 2757 | ||
2751 | void gk20a_mm_init_pdb(struct gk20a *g, struct nvgpu_mem *inst_block, | 2758 | void gk20a_mm_init_pdb(struct gk20a *g, struct nvgpu_mem *inst_block, |
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h index 16c35d34..7e2ba051 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h | |||
@@ -78,8 +78,6 @@ struct pm_ctx_desc { | |||
78 | u32 pm_mode; | 78 | u32 pm_mode; |
79 | }; | 79 | }; |
80 | 80 | ||
81 | struct gk20a; | ||
82 | |||
83 | struct compbit_store_desc { | 81 | struct compbit_store_desc { |
84 | struct nvgpu_mem mem; | 82 | struct nvgpu_mem mem; |
85 | 83 | ||
@@ -191,19 +189,19 @@ struct mm_gk20a { | |||
191 | 189 | ||
192 | struct { | 190 | struct { |
193 | u32 aperture_size; | 191 | u32 aperture_size; |
194 | struct vm_gk20a vm; | 192 | struct vm_gk20a *vm; |
195 | struct nvgpu_mem inst_block; | 193 | struct nvgpu_mem inst_block; |
196 | } bar1; | 194 | } bar1; |
197 | 195 | ||
198 | struct { | 196 | struct { |
199 | u32 aperture_size; | 197 | u32 aperture_size; |
200 | struct vm_gk20a vm; | 198 | struct vm_gk20a *vm; |
201 | struct nvgpu_mem inst_block; | 199 | struct nvgpu_mem inst_block; |
202 | } bar2; | 200 | } bar2; |
203 | 201 | ||
204 | struct { | 202 | struct { |
205 | u32 aperture_size; | 203 | u32 aperture_size; |
206 | struct vm_gk20a vm; | 204 | struct vm_gk20a *vm; |
207 | struct nvgpu_mem inst_block; | 205 | struct nvgpu_mem inst_block; |
208 | } pmu; | 206 | } pmu; |
209 | 207 | ||
@@ -213,16 +211,16 @@ struct mm_gk20a { | |||
213 | } hwpm; | 211 | } hwpm; |
214 | 212 | ||
215 | struct { | 213 | struct { |
216 | struct vm_gk20a vm; | 214 | struct vm_gk20a *vm; |
217 | struct nvgpu_mem inst_block; | 215 | struct nvgpu_mem inst_block; |
218 | } perfbuf; | 216 | } perfbuf; |
219 | 217 | ||
220 | struct { | 218 | struct { |
221 | struct vm_gk20a vm; | 219 | struct vm_gk20a *vm; |
222 | } cde; | 220 | } cde; |
223 | 221 | ||
224 | struct { | 222 | struct { |
225 | struct vm_gk20a vm; | 223 | struct vm_gk20a *vm; |
226 | } ce; | 224 | } ce; |
227 | 225 | ||
228 | struct nvgpu_mutex l2_op_lock; | 226 | struct nvgpu_mutex l2_op_lock; |
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c index e74a5264..f296b57c 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | |||
@@ -3132,7 +3132,7 @@ static int gk20a_prepare_ucode(struct gk20a *g) | |||
3132 | struct nvgpu_pmu *pmu = &g->pmu; | 3132 | struct nvgpu_pmu *pmu = &g->pmu; |
3133 | int err = 0; | 3133 | int err = 0; |
3134 | struct mm_gk20a *mm = &g->mm; | 3134 | struct mm_gk20a *mm = &g->mm; |
3135 | struct vm_gk20a *vm = &mm->pmu.vm; | 3135 | struct vm_gk20a *vm = mm->pmu.vm; |
3136 | 3136 | ||
3137 | if (pmu->fw) | 3137 | if (pmu->fw) |
3138 | return gk20a_init_pmu(pmu); | 3138 | return gk20a_init_pmu(pmu); |
@@ -3170,7 +3170,7 @@ static int gk20a_init_pmu_setup_sw(struct gk20a *g) | |||
3170 | { | 3170 | { |
3171 | struct nvgpu_pmu *pmu = &g->pmu; | 3171 | struct nvgpu_pmu *pmu = &g->pmu; |
3172 | struct mm_gk20a *mm = &g->mm; | 3172 | struct mm_gk20a *mm = &g->mm; |
3173 | struct vm_gk20a *vm = &mm->pmu.vm; | 3173 | struct vm_gk20a *vm = mm->pmu.vm; |
3174 | unsigned int i; | 3174 | unsigned int i; |
3175 | int err = 0; | 3175 | int err = 0; |
3176 | u8 *ptr; | 3176 | u8 *ptr; |
@@ -4793,7 +4793,7 @@ int gk20a_pmu_vidmem_surface_alloc(struct gk20a *g, struct nvgpu_mem *mem, | |||
4793 | u32 size) | 4793 | u32 size) |
4794 | { | 4794 | { |
4795 | struct mm_gk20a *mm = &g->mm; | 4795 | struct mm_gk20a *mm = &g->mm; |
4796 | struct vm_gk20a *vm = &mm->pmu.vm; | 4796 | struct vm_gk20a *vm = mm->pmu.vm; |
4797 | int err; | 4797 | int err; |
4798 | 4798 | ||
4799 | err = nvgpu_dma_alloc_map_vid(vm, size, mem); | 4799 | err = nvgpu_dma_alloc_map_vid(vm, size, mem); |
@@ -4809,7 +4809,7 @@ int gk20a_pmu_sysmem_surface_alloc(struct gk20a *g, struct nvgpu_mem *mem, | |||
4809 | u32 size) | 4809 | u32 size) |
4810 | { | 4810 | { |
4811 | struct mm_gk20a *mm = &g->mm; | 4811 | struct mm_gk20a *mm = &g->mm; |
4812 | struct vm_gk20a *vm = &mm->pmu.vm; | 4812 | struct vm_gk20a *vm = mm->pmu.vm; |
4813 | int err; | 4813 | int err; |
4814 | 4814 | ||
4815 | err = nvgpu_dma_alloc_map_sys(vm, size, mem); | 4815 | err = nvgpu_dma_alloc_map_sys(vm, size, mem); |