gpu: nvgpu: move mclk related functions to clk

Move mclk related functions be moved to clk structure instead of
pmu. We want to keep pmu only for basic pmu interaction and
split clk, lpwr etc.

Bug 1921094

Change-Id: I32394bc0e6d3657dfbd34dbcf19c9af56c12e194
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master/r/1506586
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

2 files changed, 7 insertions, 7 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c
index 7106ea03..65197aca 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.c
@@ -137,8 +137,8 @@ int gk20a_prepare_poweroff(struct gk20a *g)
         ret |= gk20a_mm_suspend(g);
         ret |= gk20a_fifo_suspend(g);
 
-        if (g->ops.pmu.mclk_deinit)
-                g->ops.pmu.mclk_deinit(g);
+        if (g->ops.clk.mclk_deinit)
+                g->ops.clk.mclk_deinit(g);
 
         /* Disable GPCPLL */
         if (g->ops.clk.suspend_clk_support)
@@ -273,8 +273,8 @@ int gk20a_finalize_poweron(struct gk20a *g)
                 goto done;
         }
 
-        if (g->ops.pmu.mclk_init) {
-                err = g->ops.pmu.mclk_init(g);
+        if (g->ops.clk.mclk_init) {
+                err = g->ops.clk.mclk_init(g);
                 if (err) {
                         nvgpu_err(g, "failed to set mclk");
                         /* Indicate error dont goto done */
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 06db2b7f..9b28e0c6 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -772,9 +772,6 @@ struct gpu_ops {
                         void *lsfm,     u32 *p_bl_gen_desc_size);
                 int (*flcn_populate_bl_dmem_desc)(struct gk20a *g,
                         void *lsfm,     u32 *p_bl_gen_desc_size, u32 falconid);
-                int (*mclk_init)(struct gk20a *g);
-                void (*mclk_deinit)(struct gk20a *g);
-                int (*mclk_change)(struct gk20a *g, u16 val);
                 void (*handle_ext_irq)(struct gk20a *g, u32 intr);
                 void (*set_irqmask)(struct gk20a *g);
                 u32  lspmuwprinitdone;
@@ -802,6 +799,9 @@ struct gpu_ops {
                 int (*pll_reg_write)(struct gk20a *g, u32 reg, u32 val);
                 int (*get_pll_debug_data)(struct gk20a *g,
                                 struct nvgpu_clk_pll_debug_data *d);
+                int (*mclk_init)(struct gk20a *g);
+                void (*mclk_deinit)(struct gk20a *g);
+                int (*mclk_change)(struct gk20a *g, u16 val);
         } clk;
         struct {
                 u32 (*get_arbiter_clk_domains)(struct gk20a *g);