gpu: Split clk_ops for GK20A and GM20B

Split clk_ops for GK20A and GM20B into different files

Bug 1450787

Change-Id: I34d16c54ac40c70854e80588475434c9e50b51a5
Signed-off-by: Hoang Pham <hopham@nvidia.com>
Reviewed-on: http://git-master/r/437771
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

4 files changed, 18 insertions, 4 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/clk_gk20a.c b/drivers/gpu/nvgpu/gk20a/clk_gk20a.c
index 33d81bd4..40eb06b6 100644
--- a/drivers/gpu/nvgpu/gk20a/clk_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/clk_gk20a.c
@@ -705,6 +705,11 @@ int gk20a_init_clk_support(struct gk20a *g)
         return err;
 }
 
+void gk20a_init_clk_ops(struct gpu_ops *gops)
+{
+        gops->clk.init_clk_support = gk20a_init_clk_support;
+}
+
 unsigned long gk20a_clk_get_rate(struct gk20a *g)
 {
         struct clk_gk20a *clk = &g->clk;
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c
index c69df460..e70cc0de 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.c
@@ -901,10 +901,12 @@ static int gk20a_pm_finalize_poweron(struct device *dev)
            during boot but it also significantly slows down gk20a init on
            simulation and emulation. We should remove SOB after graphics power
            saving features (blcg/slcg) are enabled. For now, do it here. */
-        err = gk20a_init_clk_support(g);
-        if (err) {
-                gk20a_err(dev, "failed to init gk20a clk");
-                goto done;
+        if (g->ops.clk.init_clk_support) {
+                err = g->ops.clk.init_clk_support(g);
+                if (err) {
+                        gk20a_err(dev, "failed to init gk20a clk");
+                        goto done;
+                }
         }
 
         /* enable pri timeout only on silicon */
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 774e4e85..0b91420b 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -230,6 +230,9 @@ struct gpu_ops {
                 int (*prepare_ucode)(struct gk20a *g);
                 int (*pmu_setup_hw_and_bootstrap)(struct gk20a *g);
         } pmu;
+        struct {
+                int (*init_clk_support)(struct gk20a *g);
+        } clk;
 };
 
 struct gk20a {
@@ -495,6 +498,8 @@ static inline void gk20a_mem_wr32(void *ptr, int w, u32 data)
         ((u32 *)ptr)[w] = data;
 }
 
+void gk20a_init_clk_ops(struct gpu_ops *gops);
+
 /* register accessors */
 int gk20a_lockout_registers(struct gk20a *g);
 int gk20a_restore_registers(struct gk20a *g);
diff --git a/drivers/gpu/nvgpu/gk20a/hal_gk20a.c b/drivers/gpu/nvgpu/gk20a/hal_gk20a.c
index ad0a3dc7..3dae9450 100644
--- a/drivers/gpu/nvgpu/gk20a/hal_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/hal_gk20a.c
@@ -24,6 +24,7 @@
 #include "gr_ctx_gk20a.h"
 #include "mm_gk20a.h"
 #include "pmu_gk20a.h"
+#include "clk_gk20a.h"
 
 struct gpu_ops gk20a_ops = {
         .clock_gating = {
@@ -50,6 +51,7 @@ int gk20a_init_hal(struct gpu_ops *gops)
         gk20a_init_gr_ctx(gops);
         gk20a_init_mm(gops);
         gk20a_init_pmu_ops(gops);
+        gk20a_init_clk_ops(gops);
         gops->name = "gk20a";
 
         return 0;