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authorAlex Waterman <alexw@nvidia.com>2018-02-21 18:59:56 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2018-02-24 00:53:38 -0500
commitb5d3cf444eeeb62a593365532b22e44f9360a484 (patch)
tree291b251e82bb469e3c8a823442d04c79ea786dbc /drivers/gpu/nvgpu/gk20a
parentbd95c2ce3f5c1bbb310d66350b33d8cc4a043073 (diff)
gpu: nvgpu: Cleanup unused variables
There are numerous places where variables are assigned to but then never used. This patch cleans up all these unused variables and in some cases simplifies surrounding logic. Also delete unused header includes and add necessary header includes. JIRA NVGPU-525 Signed-off-by: Alex Waterman <alexw@nvidia.com> Change-Id: Ice9ec2a0e97f262d0dcfebe22f83208dbea569d9 Reviewed-on: https://git-master.nvidia.com/r/1662548 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r--drivers/gpu/nvgpu/gk20a/fifo_gk20a.c19
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.c6
-rw-r--r--drivers/gpu/nvgpu/gk20a/mc_gk20a.c2
3 files changed, 3 insertions, 24 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index 884e4a02..fea46a0e 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -1215,9 +1215,7 @@ void gk20a_fifo_get_mmu_fault_info(struct gk20a *g, u32 mmu_fault_id,
1215 1215
1216void gk20a_fifo_reset_engine(struct gk20a *g, u32 engine_id) 1216void gk20a_fifo_reset_engine(struct gk20a *g, u32 engine_id)
1217{ 1217{
1218 struct fifo_gk20a *f = NULL;
1219 u32 engine_enum = ENGINE_INVAL_GK20A; 1218 u32 engine_enum = ENGINE_INVAL_GK20A;
1220 u32 inst_id = 0;
1221 struct fifo_engine_info_gk20a *engine_info; 1219 struct fifo_engine_info_gk20a *engine_info;
1222 1220
1223 gk20a_dbg_fn(""); 1221 gk20a_dbg_fn("");
@@ -1225,14 +1223,10 @@ void gk20a_fifo_reset_engine(struct gk20a *g, u32 engine_id)
1225 if (!g) 1223 if (!g)
1226 return; 1224 return;
1227 1225
1228 f = &g->fifo;
1229
1230 engine_info = gk20a_fifo_get_engine_info(g, engine_id); 1226 engine_info = gk20a_fifo_get_engine_info(g, engine_id);
1231 1227
1232 if (engine_info) { 1228 if (engine_info)
1233 engine_enum = engine_info->engine_enum; 1229 engine_enum = engine_info->engine_enum;
1234 inst_id = engine_info->inst_id;
1235 }
1236 1230
1237 if (engine_enum == ENGINE_INVAL_GK20A) 1231 if (engine_enum == ENGINE_INVAL_GK20A)
1238 nvgpu_err(g, "unsupported engine_id %d", engine_id); 1232 nvgpu_err(g, "unsupported engine_id %d", engine_id);
@@ -1300,19 +1294,15 @@ bool gk20a_fifo_should_defer_engine_reset(struct gk20a *g, u32 engine_id,
1300 u32 engine_subid, bool fake_fault) 1294 u32 engine_subid, bool fake_fault)
1301{ 1295{
1302 u32 engine_enum = ENGINE_INVAL_GK20A; 1296 u32 engine_enum = ENGINE_INVAL_GK20A;
1303 struct fifo_gk20a *fifo = NULL;
1304 struct fifo_engine_info_gk20a *engine_info; 1297 struct fifo_engine_info_gk20a *engine_info;
1305 1298
1306 if (!g) 1299 if (!g)
1307 return false; 1300 return false;
1308 1301
1309 fifo = &g->fifo;
1310
1311 engine_info = gk20a_fifo_get_engine_info(g, engine_id); 1302 engine_info = gk20a_fifo_get_engine_info(g, engine_id);
1312 1303
1313 if (engine_info) { 1304 if (engine_info)
1314 engine_enum = engine_info->engine_enum; 1305 engine_enum = engine_info->engine_enum;
1315 }
1316 1306
1317 if (engine_enum == ENGINE_INVAL_GK20A) 1307 if (engine_enum == ENGINE_INVAL_GK20A)
1318 return false; 1308 return false;
@@ -2974,7 +2964,6 @@ static void gk20a_fifo_runlist_reset_engines(struct gk20a *g, u32 runlist_id)
2974 2964
2975static int gk20a_fifo_runlist_wait_pending(struct gk20a *g, u32 runlist_id) 2965static int gk20a_fifo_runlist_wait_pending(struct gk20a *g, u32 runlist_id)
2976{ 2966{
2977 struct fifo_runlist_info_gk20a *runlist;
2978 struct nvgpu_timeout timeout; 2967 struct nvgpu_timeout timeout;
2979 unsigned long delay = GR_IDLE_CHECK_DEFAULT; 2968 unsigned long delay = GR_IDLE_CHECK_DEFAULT;
2980 int ret = -ETIMEDOUT; 2969 int ret = -ETIMEDOUT;
@@ -2982,7 +2971,6 @@ static int gk20a_fifo_runlist_wait_pending(struct gk20a *g, u32 runlist_id)
2982 nvgpu_timeout_init(g, &timeout, gk20a_get_gr_idle_timeout(g), 2971 nvgpu_timeout_init(g, &timeout, gk20a_get_gr_idle_timeout(g),
2983 NVGPU_TIMER_CPU_TIMER); 2972 NVGPU_TIMER_CPU_TIMER);
2984 2973
2985 runlist = &g->fifo.runlist_info[runlist_id];
2986 do { 2974 do {
2987 if ((gk20a_readl(g, fifo_eng_runlist_r(runlist_id)) & 2975 if ((gk20a_readl(g, fifo_eng_runlist_r(runlist_id)) &
2988 fifo_eng_runlist_pending_true_f()) == 0) { 2976 fifo_eng_runlist_pending_true_f()) == 0) {
@@ -3173,7 +3161,7 @@ static int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id,
3173 struct fifo_runlist_info_gk20a *runlist = NULL; 3161 struct fifo_runlist_info_gk20a *runlist = NULL;
3174 u32 *runlist_entry_base = NULL; 3162 u32 *runlist_entry_base = NULL;
3175 u64 runlist_iova; 3163 u64 runlist_iova;
3176 u32 old_buf, new_buf; 3164 u32 new_buf;
3177 struct channel_gk20a *ch = NULL; 3165 struct channel_gk20a *ch = NULL;
3178 struct tsg_gk20a *tsg = NULL; 3166 struct tsg_gk20a *tsg = NULL;
3179 u32 count = 0; 3167 u32 count = 0;
@@ -3205,7 +3193,6 @@ static int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id,
3205 } 3193 }
3206 } 3194 }
3207 3195
3208 old_buf = runlist->cur_buffer;
3209 new_buf = !runlist->cur_buffer; 3196 new_buf = !runlist->cur_buffer;
3210 3197
3211 runlist_iova = nvgpu_mem_get_addr(g, &runlist->mem[new_buf]); 3198 runlist_iova = nvgpu_mem_get_addr(g, &runlist->mem[new_buf]);
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index ef26a74e..8db6b42f 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -22,8 +22,6 @@
22 * DEALINGS IN THE SOFTWARE. 22 * DEALINGS IN THE SOFTWARE.
23 */ 23 */
24 24
25#include <trace/events/gk20a.h>
26
27#include <nvgpu/dma.h> 25#include <nvgpu/dma.h>
28#include <nvgpu/kmem.h> 26#include <nvgpu/kmem.h>
29#include <nvgpu/gmmu.h> 27#include <nvgpu/gmmu.h>
@@ -6171,14 +6169,10 @@ static int gr_gk20a_decode_priv_addr(struct gk20a *g, u32 addr,
6171 u32 *broadcast_flags) 6169 u32 *broadcast_flags)
6172{ 6170{
6173 u32 gpc_addr; 6171 u32 gpc_addr;
6174 u32 ppc_address;
6175 u32 ppc_broadcast_addr;
6176 6172
6177 gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg, "addr=0x%x", addr); 6173 gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg, "addr=0x%x", addr);
6178 6174
6179 /* setup defaults */ 6175 /* setup defaults */
6180 ppc_address = 0;
6181 ppc_broadcast_addr = 0;
6182 *addr_type = CTXSW_ADDR_TYPE_SYS; 6176 *addr_type = CTXSW_ADDR_TYPE_SYS;
6183 *broadcast_flags = PRI_BROADCAST_FLAGS_NONE; 6177 *broadcast_flags = PRI_BROADCAST_FLAGS_NONE;
6184 *gpc_num = 0; 6178 *gpc_num = 0;
diff --git a/drivers/gpu/nvgpu/gk20a/mc_gk20a.c b/drivers/gpu/nvgpu/gk20a/mc_gk20a.c
index 5027eaa4..b99fbdb0 100644
--- a/drivers/gpu/nvgpu/gk20a/mc_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/mc_gk20a.c
@@ -22,8 +22,6 @@
22 * DEALINGS IN THE SOFTWARE. 22 * DEALINGS IN THE SOFTWARE.
23 */ 23 */
24 24
25#include <trace/events/gk20a.h>
26
27#include "gk20a.h" 25#include "gk20a.h"
28#include "mc_gk20a.h" 26#include "mc_gk20a.h"
29 27