gpu: nvgpu: add trace event for channel reset

Change-Id: I319e877978b7f483108ef8f67c05702b71709f62
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1120501
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

2 files changed, 8 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
index da73d95d..58175141 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
@@ -853,6 +853,7 @@ static void gk20a_free_channel(struct channel_gk20a *ch)
         unsigned long timeout = gk20a_get_gr_idle_timeout(g);
         struct dbg_session_gk20a *dbg_s;
         bool was_reset;
+
         gk20a_dbg_fn("");
 
         WARN_ON(ch->g == NULL);
@@ -901,6 +902,7 @@ static void gk20a_free_channel(struct channel_gk20a *ch)
                 /* if lock is already taken, a reset is taking place
                 so no need to repeat */
                 if (!was_reset) {
+                        trace_gk20a_channel_reset(ch->hw_chid, ch->tsgid);
                         gk20a_fifo_reset_engine(g,
                                 g->fifo.deferred_fault_engines);
                 }
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index 9421c017..27a3992d 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -1053,8 +1053,13 @@ static bool gk20a_fifo_handle_mmu_fault(
                         mutex_lock(&g->fifo.gr_reset_mutex);
                         /* if lock is already taken, a reset is taking place
                         so no need to repeat */
-                        if (!was_reset)
+                        if (!was_reset) {
+                                trace_gk20a_channel_reset(
+                                        ch ? ch->hw_chid : ~0,
+                                        tsg ? tsg->tsgid :
+                                                NVGPU_INVALID_TSG_ID);
                                 gk20a_fifo_reset_engine(g, engine_id);
+                        }
                         mutex_unlock(&g->fifo.gr_reset_mutex);
                 }
                 /* disable the channel/TSG from hw and increment