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authorDavid Li <davli@nvidia.com>2017-08-11 00:44:28 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-08-31 21:44:54 -0400
commita199baede7e59fd0b303c50d4a25fc0ee7c290d9 (patch)
tree8ea5a03f27b5aa980136889300166681b91c9ac6 /drivers/gpu/nvgpu/gk20a
parent4995389f6806433c65549250b5ab953611febc40 (diff)
gpu: nvgpu: add NVGPU_SUBMIT_GPFIFO_FLAGS_RESCHEDULE_RUNLIST
NVGPU_SUBMIT_GPFIFO_FLAGS_RESCHEDULE_RUNLIST causes host to expire current timeslice and reschedule from front of runlist. This can be used with NVGPU_RUNLIST_INTERLEAVE_LEVEL_HIGH to make a channel start sooner after submit rather than waiting for natural timeslice expiration or block/finish of currently running channel. Bug 1968813 Change-Id: I632e87c5f583a09ec8bf521dc73f595150abebb0 Signed-off-by: David Li <davli@nvidia.com> Reviewed-on: http://git-master/r/#/c/1537198 Reviewed-on: https://git-master.nvidia.com/r/1537198 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r--drivers/gpu/nvgpu/gk20a/channel_gk20a.c4
-rw-r--r--drivers/gpu/nvgpu/gk20a/fifo_gk20a.c28
-rw-r--r--drivers/gpu/nvgpu/gk20a/fifo_gk20a.h2
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h1
4 files changed, 35 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
index 0c1b06e9..89862e63 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
@@ -2668,6 +2668,10 @@ int gk20a_submit_channel_gpfifo(struct channel_gk20a *c,
2668 2668
2669 g->ops.fifo.userd_gp_put(g, c); 2669 g->ops.fifo.userd_gp_put(g, c);
2670 2670
2671 if ((NVGPU_SUBMIT_GPFIFO_FLAGS_RESCHEDULE_RUNLIST & flags) &&
2672 g->ops.fifo.reschedule_runlist)
2673 g->ops.fifo.reschedule_runlist(g, c->runlist_id);
2674
2671 /* No hw access beyond this point */ 2675 /* No hw access beyond this point */
2672 if (c->deterministic) 2676 if (c->deterministic)
2673 up_read(&g->deterministic_busy); 2677 up_read(&g->deterministic_busy);
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index fd249bc9..7062a8a0 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -3211,6 +3211,34 @@ end:
3211 return ret; 3211 return ret;
3212} 3212}
3213 3213
3214/* trigger host to expire current timeslice and reschedule runlist from front */
3215int gk20a_fifo_reschedule_runlist(struct gk20a *g, u32 runlist_id)
3216{
3217 struct fifo_runlist_info_gk20a *runlist;
3218 u32 token = PMU_INVALID_MUTEX_OWNER_ID;
3219 u32 mutex_ret;
3220 int ret = 0;
3221
3222 runlist = &g->fifo.runlist_info[runlist_id];
3223 if (nvgpu_mutex_tryacquire(&runlist->mutex)) {
3224 mutex_ret = nvgpu_pmu_mutex_acquire(
3225 &g->pmu, PMU_MUTEX_ID_FIFO, &token);
3226
3227 gk20a_writel(g, fifo_runlist_r(),
3228 gk20a_readl(g, fifo_runlist_r()));
3229 gk20a_fifo_runlist_wait_pending(g, runlist_id);
3230
3231 if (!mutex_ret)
3232 nvgpu_pmu_mutex_release(
3233 &g->pmu, PMU_MUTEX_ID_FIFO, &token);
3234 nvgpu_mutex_release(&runlist->mutex);
3235 } else {
3236 /* someone else is writing fifo_runlist_r so not needed here */
3237 ret = -EBUSY;
3238 }
3239 return ret;
3240}
3241
3214/* add/remove a channel from runlist 3242/* add/remove a channel from runlist
3215 special cases below: runlist->active_channels will NOT be changed. 3243 special cases below: runlist->active_channels will NOT be changed.
3216 (chid == ~0 && !add) means remove all active channels from runlist. 3244 (chid == ~0 && !add) means remove all active channels from runlist.
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
index fb4932c8..d5b686f0 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
@@ -250,6 +250,8 @@ int gk20a_fifo_disable_all_engine_activity(struct gk20a *g,
250 bool wait_for_idle); 250 bool wait_for_idle);
251u32 gk20a_fifo_engines_on_ch(struct gk20a *g, u32 chid); 251u32 gk20a_fifo_engines_on_ch(struct gk20a *g, u32 chid);
252 252
253int gk20a_fifo_reschedule_runlist(struct gk20a *g, u32 runlist_id);
254
253int gk20a_fifo_update_runlist(struct gk20a *g, u32 engine_id, u32 chid, 255int gk20a_fifo_update_runlist(struct gk20a *g, u32 engine_id, u32 chid,
254 bool add, bool wait_for_finish); 256 bool add, bool wait_for_finish);
255 257
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 121dd962..ab715bdc 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -476,6 +476,7 @@ struct gpu_ops {
476 int (*resetup_ramfc)(struct channel_gk20a *c); 476 int (*resetup_ramfc)(struct channel_gk20a *c);
477 int (*preempt_channel)(struct gk20a *g, u32 chid); 477 int (*preempt_channel)(struct gk20a *g, u32 chid);
478 int (*preempt_tsg)(struct gk20a *g, u32 tsgid); 478 int (*preempt_tsg)(struct gk20a *g, u32 tsgid);
479 int (*reschedule_runlist)(struct gk20a *g, u32 runlist_id);
479 int (*update_runlist)(struct gk20a *g, u32 runlist_id, 480 int (*update_runlist)(struct gk20a *g, u32 runlist_id,
480 u32 chid, bool add, 481 u32 chid, bool add,
481 bool wait_for_finish); 482 bool wait_for_finish);