diff options
author | Seema Khowala <seemaj@nvidia.com> | 2017-10-30 17:15:51 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-05-18 22:54:33 -0400 |
commit | 982fcfa737be54fd0ab16792faf97a2741e34907 (patch) | |
tree | 6c45741a08156d43d2ea09a4136c104609989e42 /drivers/gpu/nvgpu/gk20a | |
parent | ac687c95d383c3fb0165e6535893510409559a8e (diff) |
gpu: nvgpu: Add timeouts_disabled_refcount for enabling timeout
-timeouts will be enabled only when timeouts_disabled_refcount
will reach 0
-timeouts_enabled debugfs will change from u32 type to file type
to avoid race enabling/disabling timeout from debugfs and ioctl
-unify setting timeouts_enabled from debugfs and ioctl
Bug 1982434
Change-Id: I54bab778f1ae533872146dfb8d80deafd2a685c7
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1588690
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/channel_gk20a.c | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 12 |
3 files changed, 13 insertions, 7 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c index a4637b8f..45ce0e77 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c | |||
@@ -1158,7 +1158,7 @@ int gk20a_channel_alloc_gpfifo(struct channel_gk20a *c, | |||
1158 | } | 1158 | } |
1159 | } | 1159 | } |
1160 | 1160 | ||
1161 | if (!c->g->timeouts_enabled || !c->timeout.enabled) | 1161 | if (!nvgpu_is_timeouts_enabled(c->g) || !c->timeout.enabled) |
1162 | acquire_timeout = 0; | 1162 | acquire_timeout = 0; |
1163 | else | 1163 | else |
1164 | acquire_timeout = c->timeout.limit_ms; | 1164 | acquire_timeout = c->timeout.limit_ms; |
@@ -1266,7 +1266,7 @@ bool gk20a_channel_update_and_check_timeout(struct channel_gk20a *ch, | |||
1266 | 1266 | ||
1267 | ch->timeout_gpfifo_get = gpfifo_get; | 1267 | ch->timeout_gpfifo_get = gpfifo_get; |
1268 | 1268 | ||
1269 | return ch->g->timeouts_enabled && | 1269 | return nvgpu_is_timeouts_enabled(ch->g) && |
1270 | ch->timeout_accumulated_ms > ch->timeout_ms_max; | 1270 | ch->timeout_accumulated_ms > ch->timeout_ms_max; |
1271 | } | 1271 | } |
1272 | 1272 | ||
@@ -1303,7 +1303,7 @@ static void __gk20a_channel_timeout_start(struct channel_gk20a *ch) | |||
1303 | */ | 1303 | */ |
1304 | static void gk20a_channel_timeout_start(struct channel_gk20a *ch) | 1304 | static void gk20a_channel_timeout_start(struct channel_gk20a *ch) |
1305 | { | 1305 | { |
1306 | if (!ch->g->timeouts_enabled) | 1306 | if (!nvgpu_is_timeouts_enabled(ch->g)) |
1307 | return; | 1307 | return; |
1308 | 1308 | ||
1309 | if (!ch->timeout.enabled) | 1309 | if (!ch->timeout.enabled) |
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 7f4a0948..964ccb03 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -2482,7 +2482,7 @@ unsigned int gk20a_fifo_handle_pbdma_intr_0(struct gk20a *g, u32 pbdma_id, | |||
2482 | 2482 | ||
2483 | val &= ~pbdma_acquire_timeout_en_enable_f(); | 2483 | val &= ~pbdma_acquire_timeout_en_enable_f(); |
2484 | gk20a_writel(g, pbdma_acquire_r(pbdma_id), val); | 2484 | gk20a_writel(g, pbdma_acquire_r(pbdma_id), val); |
2485 | if (g->timeouts_enabled) { | 2485 | if (nvgpu_is_timeouts_enabled(g)) { |
2486 | rc_type = RC_TYPE_PBDMA_FAULT; | 2486 | rc_type = RC_TYPE_PBDMA_FAULT; |
2487 | nvgpu_err(g, | 2487 | nvgpu_err(g, |
2488 | "semaphore acquire timeout!"); | 2488 | "semaphore acquire timeout!"); |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 84d3f639..f6318257 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -1314,7 +1314,7 @@ struct gk20a { | |||
1314 | struct railgate_stats pstats; | 1314 | struct railgate_stats pstats; |
1315 | #endif | 1315 | #endif |
1316 | u32 gr_idle_timeout_default; | 1316 | u32 gr_idle_timeout_default; |
1317 | bool timeouts_enabled; | 1317 | bool timeouts_disabled_by_user; |
1318 | unsigned int ch_wdt_timeout_ms; | 1318 | unsigned int ch_wdt_timeout_ms; |
1319 | 1319 | ||
1320 | struct nvgpu_mutex poweron_lock; | 1320 | struct nvgpu_mutex poweron_lock; |
@@ -1376,7 +1376,8 @@ struct gk20a { | |||
1376 | /* also prevents debug sessions from attaching until released */ | 1376 | /* also prevents debug sessions from attaching until released */ |
1377 | struct nvgpu_mutex dbg_sessions_lock; | 1377 | struct nvgpu_mutex dbg_sessions_lock; |
1378 | int dbg_powergating_disabled_refcount; /*refcount for pg disable */ | 1378 | int dbg_powergating_disabled_refcount; /*refcount for pg disable */ |
1379 | int dbg_timeout_disabled_refcount; /*refcount for timeout disable */ | 1379 | /*refcount for timeout disable */ |
1380 | nvgpu_atomic_t timeouts_disabled_refcount; | ||
1380 | 1381 | ||
1381 | /* must have dbg_sessions_lock before use */ | 1382 | /* must have dbg_sessions_lock before use */ |
1382 | struct nvgpu_dbg_reg_op *dbg_regops_tmp_buf; | 1383 | struct nvgpu_dbg_reg_op *dbg_regops_tmp_buf; |
@@ -1508,9 +1509,14 @@ struct gk20a { | |||
1508 | struct nvgpu_list_node boardobjgrp_head; | 1509 | struct nvgpu_list_node boardobjgrp_head; |
1509 | }; | 1510 | }; |
1510 | 1511 | ||
1512 | static inline bool nvgpu_is_timeouts_enabled(struct gk20a *g) | ||
1513 | { | ||
1514 | return nvgpu_atomic_read(&g->timeouts_disabled_refcount) == 0; | ||
1515 | } | ||
1516 | |||
1511 | static inline unsigned long gk20a_get_gr_idle_timeout(struct gk20a *g) | 1517 | static inline unsigned long gk20a_get_gr_idle_timeout(struct gk20a *g) |
1512 | { | 1518 | { |
1513 | return g->timeouts_enabled ? | 1519 | return nvgpu_is_timeouts_enabled(g) ? |
1514 | g->gr_idle_timeout_default : ULONG_MAX; | 1520 | g->gr_idle_timeout_default : ULONG_MAX; |
1515 | } | 1521 | } |
1516 | 1522 | ||