gpu: nvgpu: PMU ACR interface header reorg

Moved ACR interface from pmu_api.h to
gpmuif_acr.h header file

gpmuif_acr.h - PMU Command/Message Interfaces for
Access Control Region (ACR)

Jira NVGPU-19

Change-Id: Ic37ff3f4ca069aa4bdd6729bbfccc00e15185b02
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1297369
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

2 files changed, 0 insertions, 98 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/pmu_api.h b/drivers/gpu/nvgpu/gk20a/pmu_api.h
index 4d249524..ad8a6903 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_api.h
+++ b/drivers/gpu/nvgpu/gk20a/pmu_api.h
@@ -17,94 +17,6 @@
 #include <nvgpu/flcnif_cmn.h>
 #include "pmuif/gpmuif_pg_rppg.h"
 
-/* ACR Commands/Message structures */
-
-enum {
-        PMU_ACR_CMD_ID_INIT_WPR_REGION = 0x0,
-        PMU_ACR_CMD_ID_BOOTSTRAP_FALCON,
-        PMU_ACR_CMD_ID_RESERVED,
-        PMU_ACR_CMD_ID_BOOTSTRAP_MULTIPLE_FALCONS,
-};
-
-/*
- * Initializes the WPR region details
- */
-struct pmu_acr_cmd_init_wpr_details {
-        u8  cmd_type;
-        u32 regionid;
-        u32 wproffset;
-
-};
-
-/*
- * falcon ID to bootstrap
- */
-struct pmu_acr_cmd_bootstrap_falcon {
-        u8 cmd_type;
-        u32 flags;
-        u32 falconid;
-};
-
-/*
- * falcon ID to bootstrap
- */
-struct pmu_acr_cmd_bootstrap_multiple_falcons {
-        u8 cmd_type;
-        u32 flags;
-        u32 falconidmask;
-        u32 usevamask;
-        struct falc_u64 wprvirtualbase;
-};
-
-#define PMU_ACR_CMD_BOOTSTRAP_FALCON_FLAGS_RESET_NO  1
-#define PMU_ACR_CMD_BOOTSTRAP_FALCON_FLAGS_RESET_YES 0
-
-
-struct pmu_acr_cmd {
-        union {
-                u8 cmd_type;
-                struct pmu_acr_cmd_bootstrap_falcon bootstrap_falcon;
-                struct pmu_acr_cmd_init_wpr_details init_wpr;
-                struct pmu_acr_cmd_bootstrap_multiple_falcons boot_falcons;
-        };
-};
-
-/* acr messages */
-
-/*
- * returns the WPR region init information
- */
-#define PMU_ACR_MSG_ID_INIT_WPR_REGION   0
-
-/*
- * Returns the Bootstrapped falcon ID to RM
- */
-#define PMU_ACR_MSG_ID_BOOTSTRAP_FALCON  1
-
-/*
- * Returns the WPR init status
- */
-#define PMU_ACR_SUCCESS                  0
-#define PMU_ACR_ERROR                    1
-
-/*
- * PMU notifies about bootstrap status of falcon
- */
-struct pmu_acr_msg_bootstrap_falcon {
-        u8 msg_type;
-        union {
-                u32 errorcode;
-                u32 falconid;
-        };
-};
-
-struct pmu_acr_msg {
-        union {
-                u8 msg_type;
-                struct pmu_acr_msg_bootstrap_falcon acrmsg;
-        };
-};
-/*---------------------------------------------------------*/
 /* FECS mem override command*/
 
 #define PMU_LRF_TEX_LTC_DRAM_CMD_ID_EN_DIS   0
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
index 87246f42..2f679970 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
@@ -124,16 +124,6 @@ struct pmu_ucode_desc_v1 {
         u32 compressed;
 };
 
-/***************************** ACR ERROR CODES  ******************************/
-/*!
- * Error codes used in PMU-ACR Task
- *
- * LSF_ACR_INVALID_TRANSCFG_SETUP : Indicates that TRANSCFG Setup is not valid
- *  MAILBOX1 returns the CTXDMA ID of invalid setup
- *
- */
-#define ACR_ERROR_INVALID_TRANSCFG_SETUP        (0xAC120001)
-
 #define PMU_PGENG_GR_BUFFER_IDX_INIT    (0)
 #define PMU_PGENG_GR_BUFFER_IDX_ZBC     (1)
 #define PMU_PGENG_GR_BUFFER_IDX_FECS    (2)