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authorThomas Fleury <tfleury@nvidia.com>2017-05-12 14:14:31 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-06-21 00:43:42 -0400
commit83f8bb225b074bfdf11a2da6c21acf204eecb293 (patch)
treec560bfd66c19199f00d85a5c63b4252784dd444d /drivers/gpu/nvgpu/gk20a
parentd0ea8fe969b2a8f7509621103c1ead83187b798b (diff)
gpu: nvgpu: mclk switching sequences for PG419
VBIOS memory settings have been updated for PG419, significantly modifying MCLK switching sequences. This change adds support for PG419 tables, while remaining backward compatible with PG418. Bug 1921082 JIRA EVLR-1269 Change-Id: Ia8a1f8b3f482e348a46f0acb540af23287d9c11e Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1484110 (cherry picked from commit c2444ae89caf97da2702e8486cc8fb162b4f50b1) Reviewed-on: http://git-master/r/1485300 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h5
-rw-r--r--drivers/gpu/nvgpu/gk20a/platform_gk20a.h3
2 files changed, 7 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 19012bf5..d036a5ea 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -775,6 +775,7 @@ struct gpu_ops {
775 void *lsfm, u32 *p_bl_gen_desc_size, u32 falconid); 775 void *lsfm, u32 *p_bl_gen_desc_size, u32 falconid);
776 int (*mclk_init)(struct gk20a *g); 776 int (*mclk_init)(struct gk20a *g);
777 void (*mclk_deinit)(struct gk20a *g); 777 void (*mclk_deinit)(struct gk20a *g);
778 int (*mclk_change)(struct gk20a *g, u16 val);
778 u32 lspmuwprinitdone; 779 u32 lspmuwprinitdone;
779 u32 lsfloadedfalconid; 780 u32 lsfloadedfalconid;
780 bool fecsbootstrapdone; 781 bool fecsbootstrapdone;
@@ -1286,12 +1287,14 @@ struct gk20a {
1286 * from monitoring power, current and voltage */ 1287 * from monitoring power, current and voltage */
1287 bool power_sensor_missing; 1288 bool power_sensor_missing;
1288 1289
1290 /* memory training sequence and mclk switch scripts */
1291 u32 mem_config_idx;
1292
1289#if defined(CONFIG_TEGRA_GK20A_NVHOST) && defined(CONFIG_TEGRA_19x_GPU) 1293#if defined(CONFIG_TEGRA_GK20A_NVHOST) && defined(CONFIG_TEGRA_19x_GPU)
1290 phys_addr_t syncpt_unit_base; 1294 phys_addr_t syncpt_unit_base;
1291 size_t syncpt_unit_size; 1295 size_t syncpt_unit_size;
1292 u32 syncpt_size; 1296 u32 syncpt_size;
1293#endif 1297#endif
1294
1295}; 1298};
1296 1299
1297static inline unsigned long gk20a_get_gr_idle_timeout(struct gk20a *g) 1300static inline unsigned long gk20a_get_gr_idle_timeout(struct gk20a *g)
diff --git a/drivers/gpu/nvgpu/gk20a/platform_gk20a.h b/drivers/gpu/nvgpu/gk20a/platform_gk20a.h
index 72322e54..63d2c5a2 100644
--- a/drivers/gpu/nvgpu/gk20a/platform_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/platform_gk20a.h
@@ -235,6 +235,9 @@ struct gk20a_platform {
235 u32 ina3221_dcb_index; 235 u32 ina3221_dcb_index;
236 u32 ina3221_i2c_address; 236 u32 ina3221_i2c_address;
237 u32 ina3221_i2c_port; 237 u32 ina3221_i2c_port;
238
239 /* memory training pattern and mclk switch sequences */
240 u8 mem_config_idx;
238}; 241};
239 242
240static inline struct gk20a_platform *gk20a_get_platform( 243static inline struct gk20a_platform *gk20a_get_platform(