diff options
author | Thomas Fleury <tfleury@nvidia.com> | 2016-05-27 12:25:04 -0400 |
---|---|---|
committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-05-31 22:14:17 -0400 |
commit | 6f5bdfd0916b139389e5dcccb1783b5da1c79953 (patch) | |
tree | 46ea7be167ad8be9365fc8b95f302f6f2516064e /drivers/gpu/nvgpu/gk20a | |
parent | e8fd660ab98a05cdb5195954eb171dbaef02b83e (diff) |
gpu: nvgpu: fix timeout on FECS trace flush
When resetting GR engine flush FECS trace before
halting the pipeline. Otherwise FECS remains in
sideband method processing loop, and we get a
timeout on FECS trace flush
Bug 200193891
Change-Id: I137ea20eb1fb4ef6d618cd01cd3c096471eb8fb0
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1155240
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 2f7cb888..f8382afe 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -834,14 +834,14 @@ void gk20a_fifo_reset_engine(struct gk20a *g, u32 engine_id) | |||
834 | if (engine_id == ENGINE_GR_GK20A) { | 834 | if (engine_id == ENGINE_GR_GK20A) { |
835 | if (support_gk20a_pmu(g->dev) && g->elpg_enabled) | 835 | if (support_gk20a_pmu(g->dev) && g->elpg_enabled) |
836 | gk20a_pmu_disable_elpg(g); | 836 | gk20a_pmu_disable_elpg(g); |
837 | /*HALT_PIPELINE method, halt GR engine*/ | ||
838 | if (gr_gk20a_halt_pipe(g)) | ||
839 | gk20a_err(dev_from_gk20a(g), "failed to HALT gr pipe"); | ||
840 | /* resetting engine will alter read/write index. | 837 | /* resetting engine will alter read/write index. |
841 | * need to flush circular buffer before re-enabling FECS. | 838 | * need to flush circular buffer before re-enabling FECS. |
842 | */ | 839 | */ |
843 | if (g->ops.fecs_trace.reset) | 840 | if (g->ops.fecs_trace.reset) |
844 | g->ops.fecs_trace.reset(g); | 841 | g->ops.fecs_trace.reset(g); |
842 | /*HALT_PIPELINE method, halt GR engine*/ | ||
843 | if (gr_gk20a_halt_pipe(g)) | ||
844 | gk20a_err(dev_from_gk20a(g), "failed to HALT gr pipe"); | ||
845 | /* resetting engine using mc_enable_r() is not | 845 | /* resetting engine using mc_enable_r() is not |
846 | enough, we do full init sequence */ | 846 | enough, we do full init sequence */ |
847 | gk20a_gr_reset(g); | 847 | gk20a_gr_reset(g); |