diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2014-12-08 07:06:04 -0500 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:12:27 -0400 |
commit | 69bb5e156944d5df715d6bb388fd1c97fe458f18 (patch) | |
tree | 3dccb664a28eec9d72b8f40cb78afd31779e6cc0 /drivers/gpu/nvgpu/gk20a | |
parent | 0abb99eb9c145711f0021280b19825d6cd0b5f3f (diff) |
gpu: nvgpu: Simplify pagepool size query
Make pagepool size query into a function instead of storing the value
during boot time in a structure. This simplifies the structure and
users of pagepool size do not need to worry about whether it has
already been set.
Change-Id: Iba16e840cdf9b6c39449730237aa7d8fdff47848
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/660907
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 14 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.h | 2 |
3 files changed, 6 insertions, 12 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index ca6a8ae0..ef43d29a 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -143,7 +143,7 @@ struct gpu_ops { | |||
143 | struct zbc_entry *color_val, u32 index); | 143 | struct zbc_entry *color_val, u32 index); |
144 | int (*add_zbc_depth)(struct gk20a *g, struct gr_gk20a *gr, | 144 | int (*add_zbc_depth)(struct gk20a *g, struct gr_gk20a *gr, |
145 | struct zbc_entry *depth_val, u32 index); | 145 | struct zbc_entry *depth_val, u32 index); |
146 | void (*buffer_size_defaults)(struct gk20a *g); | 146 | u32 (*pagepool_default_size)(struct gk20a *g); |
147 | } gr; | 147 | } gr; |
148 | const char *name; | 148 | const char *name; |
149 | struct { | 149 | struct { |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 7cd99a63..f2b0c83c 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -858,7 +858,7 @@ static int gr_gk20a_commit_global_ctx_buffers(struct gk20a *g, | |||
858 | size = gr->global_ctx_buffer[PAGEPOOL].size / | 858 | size = gr->global_ctx_buffer[PAGEPOOL].size / |
859 | gr_scc_pagepool_total_pages_byte_granularity_v(); | 859 | gr_scc_pagepool_total_pages_byte_granularity_v(); |
860 | 860 | ||
861 | if (size == gr->pagepool_default_size) | 861 | if (size == g->ops.gr.pagepool_default_size(g)) |
862 | size = gr_scc_pagepool_total_pages_hwmax_v(); | 862 | size = gr_scc_pagepool_total_pages_hwmax_v(); |
863 | 863 | ||
864 | gk20a_dbg_info("pagepool buffer addr : 0x%016llx, size : %d", | 864 | gk20a_dbg_info("pagepool buffer addr : 0x%016llx, size : %d", |
@@ -2301,7 +2301,7 @@ static int gr_gk20a_alloc_global_ctx_buffers(struct gk20a *g) | |||
2301 | u32 cb_buffer_size = gr->bundle_cb_default_size * | 2301 | u32 cb_buffer_size = gr->bundle_cb_default_size * |
2302 | gr_scc_bundle_cb_size_div_256b_byte_granularity_v(); | 2302 | gr_scc_bundle_cb_size_div_256b_byte_granularity_v(); |
2303 | 2303 | ||
2304 | u32 pagepool_buffer_size = gr->pagepool_default_size * | 2304 | u32 pagepool_buffer_size = g->ops.gr.pagepool_default_size(g) * |
2305 | gr_scc_pagepool_total_pages_byte_granularity_v(); | 2305 | gr_scc_pagepool_total_pages_byte_granularity_v(); |
2306 | 2306 | ||
2307 | gk20a_dbg_fn(""); | 2307 | gk20a_dbg_fn(""); |
@@ -3187,7 +3187,6 @@ static int gr_gk20a_init_gr_config(struct gk20a *g, struct gr_gk20a *gr) | |||
3187 | g->ops.gr.bundle_cb_defaults(g); | 3187 | g->ops.gr.bundle_cb_defaults(g); |
3188 | g->ops.gr.cb_size_default(g); | 3188 | g->ops.gr.cb_size_default(g); |
3189 | g->ops.gr.calc_global_ctx_buffer_size(g); | 3189 | g->ops.gr.calc_global_ctx_buffer_size(g); |
3190 | g->ops.gr.buffer_size_defaults(g); | ||
3191 | gr->timeslice_mode = gr_gpcs_ppcs_cbm_cfg_timeslice_mode_enable_v(); | 3190 | gr->timeslice_mode = gr_gpcs_ppcs_cbm_cfg_timeslice_mode_enable_v(); |
3192 | 3191 | ||
3193 | gk20a_dbg_info("bundle_cb_default_size: %d", | 3192 | gk20a_dbg_info("bundle_cb_default_size: %d", |
@@ -7318,12 +7317,9 @@ void gk20a_resume_all_sms(struct gk20a *g) | |||
7318 | gr_gpcs_tpcs_sm_dbgr_control0_r(), dbgr_control0); | 7317 | gr_gpcs_tpcs_sm_dbgr_control0_r(), dbgr_control0); |
7319 | } | 7318 | } |
7320 | 7319 | ||
7321 | static void gr_gk20a_buffer_size_defaults(struct gk20a *g) | 7320 | static u32 gr_gk20a_pagepool_default_size(struct gk20a *g) |
7322 | { | 7321 | { |
7323 | g->gr.pagepool_default_size = | 7322 | return gr_scc_pagepool_total_pages_hwmax_value_v(); |
7324 | gr_scc_pagepool_total_pages_hwmax_value_v(); | ||
7325 | g->gr.pagepool_max_size = | ||
7326 | gr_scc_pagepool_total_pages_hwmax_value_v(); | ||
7327 | } | 7323 | } |
7328 | 7324 | ||
7329 | void gk20a_init_gr_ops(struct gpu_ops *gops) | 7325 | void gk20a_init_gr_ops(struct gpu_ops *gops) |
@@ -7362,6 +7358,6 @@ void gk20a_init_gr_ops(struct gpu_ops *gops) | |||
7362 | gops->gr.detect_sm_arch = gr_gk20a_detect_sm_arch; | 7358 | gops->gr.detect_sm_arch = gr_gk20a_detect_sm_arch; |
7363 | gops->gr.add_zbc_color = gr_gk20a_add_zbc_color; | 7359 | gops->gr.add_zbc_color = gr_gk20a_add_zbc_color; |
7364 | gops->gr.add_zbc_depth = gr_gk20a_add_zbc_depth; | 7360 | gops->gr.add_zbc_depth = gr_gk20a_add_zbc_depth; |
7365 | gops->gr.buffer_size_defaults = gr_gk20a_buffer_size_defaults; | 7361 | gops->gr.pagepool_default_size = gr_gk20a_pagepool_default_size; |
7366 | } | 7362 | } |
7367 | 7363 | ||
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h index c5dd80ea..e5d315e5 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h | |||
@@ -243,8 +243,6 @@ struct gr_gk20a { | |||
243 | u32 alpha_cb_default_size; | 243 | u32 alpha_cb_default_size; |
244 | u32 alpha_cb_size; | 244 | u32 alpha_cb_size; |
245 | u32 timeslice_mode; | 245 | u32 timeslice_mode; |
246 | u32 pagepool_default_size; | ||
247 | u32 pagepool_max_size; | ||
248 | 246 | ||
249 | struct gr_ctx_buffer_desc global_ctx_buffer[NR_GLOBAL_CTX_BUF]; | 247 | struct gr_ctx_buffer_desc global_ctx_buffer[NR_GLOBAL_CTX_BUF]; |
250 | 248 | ||