diff options
author | David Nieto <dmartineznie@nvidia.com> | 2017-10-26 18:00:47 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-11-01 12:36:07 -0400 |
commit | 68dbfedd4f837d1bf2bab128500140f5d8cfadac (patch) | |
tree | e670938934170f955819a0a7b5ed73d2d2a63401 /drivers/gpu/nvgpu/gk20a | |
parent | e9b77d72491fdf09e0ff54e4d5cf365861981162 (diff) |
gpu: nvgpu: fix pte location functions
Modify the recursive loop in pte_find to make sure it is targeting the proper
pde page size.
JIRA NVGPUGV100-36
Change-Id: Ib3673d8d9f1bd3c907d532f9e2562ecdc5dda4af
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1586739
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/mm_gk20a.c | 30 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/mm_gk20a.h | 4 |
2 files changed, 30 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c index 62f19039..cb0c015e 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c | |||
@@ -287,15 +287,35 @@ static void update_gmmu_pte_locked(struct vm_gk20a *vm, | |||
287 | pd_write(g, pd, pd_offset + 1, pte_w[1]); | 287 | pd_write(g, pd, pd_offset + 1, pte_w[1]); |
288 | } | 288 | } |
289 | 289 | ||
290 | enum gmmu_pgsz_gk20a gk20a_get_pde_pgsz(struct gk20a *g, | ||
291 | struct nvgpu_gmmu_pd *pd, u32 pd_idx) | ||
292 | { | ||
293 | /* | ||
294 | * big and small page sizes are the same | ||
295 | */ | ||
296 | return gmmu_page_size_small; | ||
297 | } | ||
298 | |||
299 | enum gmmu_pgsz_gk20a gk20a_get_pte_pgsz(struct gk20a *g, | ||
300 | struct nvgpu_gmmu_pd *pd, u32 pd_idx) | ||
301 | { | ||
302 | /* | ||
303 | * return invalid | ||
304 | */ | ||
305 | return gmmu_nr_page_sizes; | ||
306 | } | ||
307 | |||
290 | const struct gk20a_mmu_level gk20a_mm_levels_64k[] = { | 308 | const struct gk20a_mmu_level gk20a_mm_levels_64k[] = { |
291 | {.hi_bit = {NV_GMMU_VA_RANGE-1, NV_GMMU_VA_RANGE-1}, | 309 | {.hi_bit = {NV_GMMU_VA_RANGE-1, NV_GMMU_VA_RANGE-1}, |
292 | .lo_bit = {26, 26}, | 310 | .lo_bit = {26, 26}, |
293 | .update_entry = update_gmmu_pde_locked, | 311 | .update_entry = update_gmmu_pde_locked, |
294 | .entry_size = 8}, | 312 | .entry_size = 8, |
313 | .get_pgsz = gk20a_get_pde_pgsz}, | ||
295 | {.hi_bit = {25, 25}, | 314 | {.hi_bit = {25, 25}, |
296 | .lo_bit = {12, 16}, | 315 | .lo_bit = {12, 16}, |
297 | .update_entry = update_gmmu_pte_locked, | 316 | .update_entry = update_gmmu_pte_locked, |
298 | .entry_size = 8}, | 317 | .entry_size = 8, |
318 | .get_pgsz = gk20a_get_pte_pgsz}, | ||
299 | {.update_entry = NULL} | 319 | {.update_entry = NULL} |
300 | }; | 320 | }; |
301 | 321 | ||
@@ -303,11 +323,13 @@ const struct gk20a_mmu_level gk20a_mm_levels_128k[] = { | |||
303 | {.hi_bit = {NV_GMMU_VA_RANGE-1, NV_GMMU_VA_RANGE-1}, | 323 | {.hi_bit = {NV_GMMU_VA_RANGE-1, NV_GMMU_VA_RANGE-1}, |
304 | .lo_bit = {27, 27}, | 324 | .lo_bit = {27, 27}, |
305 | .update_entry = update_gmmu_pde_locked, | 325 | .update_entry = update_gmmu_pde_locked, |
306 | .entry_size = 8}, | 326 | .entry_size = 8, |
327 | .get_pgsz = gk20a_get_pde_pgsz}, | ||
307 | {.hi_bit = {26, 26}, | 328 | {.hi_bit = {26, 26}, |
308 | .lo_bit = {12, 17}, | 329 | .lo_bit = {12, 17}, |
309 | .update_entry = update_gmmu_pte_locked, | 330 | .update_entry = update_gmmu_pte_locked, |
310 | .entry_size = 8}, | 331 | .entry_size = 8, |
332 | .get_pgsz = gk20a_get_pte_pgsz}, | ||
311 | {.update_entry = NULL} | 333 | {.update_entry = NULL} |
312 | }; | 334 | }; |
313 | 335 | ||
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h index 183d6211..2478ee1f 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h | |||
@@ -183,4 +183,8 @@ void gk20a_mm_init_pdb(struct gk20a *g, struct nvgpu_mem *mem, | |||
183 | extern const struct gk20a_mmu_level gk20a_mm_levels_64k[]; | 183 | extern const struct gk20a_mmu_level gk20a_mm_levels_64k[]; |
184 | extern const struct gk20a_mmu_level gk20a_mm_levels_128k[]; | 184 | extern const struct gk20a_mmu_level gk20a_mm_levels_128k[]; |
185 | 185 | ||
186 | enum gmmu_pgsz_gk20a gk20a_get_pde_pgsz(struct gk20a *g, | ||
187 | struct nvgpu_gmmu_pd *pd, u32 pd_idx); | ||
188 | enum gmmu_pgsz_gk20a gk20a_get_pte_pgsz(struct gk20a *g, | ||
189 | struct nvgpu_gmmu_pd *pd, u32 pd_idx); | ||
186 | #endif /* MM_GK20A_H */ | 190 | #endif /* MM_GK20A_H */ |