diff options
author | Aingara Paramakuru <aparamakuru@nvidia.com> | 2016-04-20 15:28:19 -0400 |
---|---|---|
committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-04-27 11:47:22 -0400 |
commit | 610a523b7d9c62e5b4d6444f738acc62d779713b (patch) | |
tree | 829c7b8409359c8c4e6f6b385bdfa1346c14e8b4 /drivers/gpu/nvgpu/gk20a | |
parent | 2db5e4794e37952bdbd2882c22ba810a45e9ea84 (diff) |
gpu: nvgpu: add TSG timeslice support
Add support for changing a TSG's timeslice, within reasonable
limits imposed by the kernel driver.
JIRA VFND-1494
Bug 1749744
Change-Id: Ifca1b63a00da7a5872483bb56692da70a5f18bdf
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/1129837
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/tsg_gk20a.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c index 0eaa23ab..40c871ce 100644 --- a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c | |||
@@ -25,6 +25,9 @@ | |||
25 | #include "gk20a.h" | 25 | #include "gk20a.h" |
26 | #include "hw_ccsr_gk20a.h" | 26 | #include "hw_ccsr_gk20a.h" |
27 | 27 | ||
28 | #define NVGPU_TSG_MIN_TIMESLICE_US 1000 | ||
29 | #define NVGPU_TSG_MAX_TIMESLICE_US 50000 | ||
30 | |||
28 | static void gk20a_tsg_release(struct kref *ref); | 31 | static void gk20a_tsg_release(struct kref *ref); |
29 | 32 | ||
30 | bool gk20a_is_channel_marked_as_tsg(struct channel_gk20a *ch) | 33 | bool gk20a_is_channel_marked_as_tsg(struct channel_gk20a *ch) |
@@ -345,6 +348,20 @@ static int gk20a_tsg_set_runlist_interleave(struct tsg_gk20a *tsg, u32 level) | |||
345 | return ret ? ret : g->ops.fifo.update_runlist(g, 0, ~0, true, true); | 348 | return ret ? ret : g->ops.fifo.update_runlist(g, 0, ~0, true, true); |
346 | } | 349 | } |
347 | 350 | ||
351 | static int gk20a_tsg_set_timeslice(struct tsg_gk20a *tsg, u32 timeslice) | ||
352 | { | ||
353 | struct gk20a *g = tsg->g; | ||
354 | |||
355 | if (timeslice < NVGPU_TSG_MIN_TIMESLICE_US || | ||
356 | timeslice > NVGPU_TSG_MAX_TIMESLICE_US) | ||
357 | return -EINVAL; | ||
358 | |||
359 | gk20a_channel_get_timescale_from_timeslice(g, timeslice, | ||
360 | &tsg->timeslice_timeout, &tsg->timeslice_scale); | ||
361 | |||
362 | return g->ops.fifo.update_runlist(g, 0, ~0, true, true); | ||
363 | } | ||
364 | |||
348 | static void release_used_tsg(struct fifo_gk20a *f, struct tsg_gk20a *tsg) | 365 | static void release_used_tsg(struct fifo_gk20a *f, struct tsg_gk20a *tsg) |
349 | { | 366 | { |
350 | mutex_lock(&f->tsg_inuse_mutex); | 367 | mutex_lock(&f->tsg_inuse_mutex); |
@@ -554,6 +571,20 @@ long gk20a_tsg_dev_ioctl(struct file *filp, unsigned int cmd, | |||
554 | break; | 571 | break; |
555 | } | 572 | } |
556 | 573 | ||
574 | case NVGPU_IOCTL_TSG_SET_TIMESLICE: | ||
575 | { | ||
576 | err = gk20a_busy(g->dev); | ||
577 | if (err) { | ||
578 | gk20a_err(dev_from_gk20a(g), | ||
579 | "failed to host gk20a for ioctl cmd: 0x%x", cmd); | ||
580 | return err; | ||
581 | } | ||
582 | err = gk20a_tsg_set_timeslice(tsg, | ||
583 | ((struct nvgpu_timeslice_args *)buf)->timeslice_us); | ||
584 | gk20a_idle(g->dev); | ||
585 | break; | ||
586 | } | ||
587 | |||
557 | default: | 588 | default: |
558 | gk20a_err(dev_from_gk20a(g), | 589 | gk20a_err(dev_from_gk20a(g), |
559 | "unrecognized tsg gpu ioctl cmd: 0x%x", | 590 | "unrecognized tsg gpu ioctl cmd: 0x%x", |