diff options
author | Thomas Fleury <tfleury@nvidia.com> | 2016-10-29 17:11:19 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2016-12-07 18:01:17 -0500 |
commit | 60a9fcb467a631b3631dbd6058b036223d6d89a3 (patch) | |
tree | e39075c7b6803008c07f456a87c1a5098071f865 /drivers/gpu/nvgpu/gk20a | |
parent | a8f90069e985ef93435e843824edf36e95040233 (diff) |
gpu: nvgpu: fix clock controls compile
Add clock controls only for ARCH_T18x and later.
Jira DNVGPU-125
Change-Id: Iab7c831aec925253dd3d9336c653305cb96e052c
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1244932
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c | 23 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.c | 4 |
2 files changed, 19 insertions, 8 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c index 9082f861..a00c21b6 100644 --- a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c | |||
@@ -30,19 +30,20 @@ | |||
30 | #include "hw_gr_gk20a.h" | 30 | #include "hw_gr_gk20a.h" |
31 | #include "hw_fb_gk20a.h" | 31 | #include "hw_fb_gk20a.h" |
32 | #include "hw_timer_gk20a.h" | 32 | #include "hw_timer_gk20a.h" |
33 | #include "clk/clk_arb.h" | ||
34 | 33 | ||
35 | 34 | ||
36 | struct gk20a_ctrl_priv { | 35 | struct gk20a_ctrl_priv { |
37 | struct device *dev; | 36 | struct device *dev; |
37 | #ifdef CONFIG_ARCH_TEGRA_18x_SOC | ||
38 | struct nvgpu_clk_session *clk_session; | 38 | struct nvgpu_clk_session *clk_session; |
39 | #endif | ||
39 | }; | 40 | }; |
40 | 41 | ||
41 | int gk20a_ctrl_dev_open(struct inode *inode, struct file *filp) | 42 | int gk20a_ctrl_dev_open(struct inode *inode, struct file *filp) |
42 | { | 43 | { |
43 | struct gk20a *g; | 44 | struct gk20a *g; |
44 | struct gk20a_ctrl_priv *priv; | 45 | struct gk20a_ctrl_priv *priv; |
45 | int err; | 46 | int err = 0; |
46 | 47 | ||
47 | gk20a_dbg_fn(""); | 48 | gk20a_dbg_fn(""); |
48 | 49 | ||
@@ -64,19 +65,23 @@ int gk20a_ctrl_dev_open(struct inode *inode, struct file *filp) | |||
64 | gk20a_idle(g->dev); | 65 | gk20a_idle(g->dev); |
65 | } | 66 | } |
66 | 67 | ||
67 | return nvgpu_clk_arb_init_session(g, &priv->clk_session); | 68 | #ifdef CONFIG_ARCH_TEGRA_18x_SOC |
69 | err = nvgpu_clk_arb_init_session(g, &priv->clk_session); | ||
70 | #endif | ||
71 | return err; | ||
68 | } | 72 | } |
69 | 73 | ||
70 | int gk20a_ctrl_dev_release(struct inode *inode, struct file *filp) | 74 | int gk20a_ctrl_dev_release(struct inode *inode, struct file *filp) |
71 | { | 75 | { |
72 | struct gk20a_ctrl_priv *priv = filp->private_data; | 76 | struct gk20a_ctrl_priv *priv = filp->private_data; |
73 | struct gk20a *g = gk20a_from_dev(priv->dev); | ||
74 | struct nvgpu_clk_session *clk_session = priv->clk_session; | ||
75 | 77 | ||
76 | gk20a_dbg_fn(""); | 78 | gk20a_dbg_fn(""); |
77 | 79 | ||
78 | if (clk_session) | 80 | #ifdef CONFIG_ARCH_TEGRA_18x_SOC |
79 | nvgpu_clk_arb_release_session(g, clk_session); | 81 | if (priv->clk_session) |
82 | nvgpu_clk_arb_release_session(gk20a_from_dev(priv->dev), | ||
83 | priv->clk_session); | ||
84 | #endif | ||
80 | kfree(priv); | 85 | kfree(priv); |
81 | 86 | ||
82 | return 0; | 87 | return 0; |
@@ -820,6 +825,7 @@ static int nvgpu_gpu_get_memory_state(struct gk20a *g, | |||
820 | return err; | 825 | return err; |
821 | } | 826 | } |
822 | 827 | ||
828 | #ifdef CONFIG_ARCH_TEGRA_18x_SOC | ||
823 | static int nvgpu_gpu_clk_get_vf_points(struct gk20a *g, | 829 | static int nvgpu_gpu_clk_get_vf_points(struct gk20a *g, |
824 | struct gk20a_ctrl_priv *priv, | 830 | struct gk20a_ctrl_priv *priv, |
825 | struct nvgpu_gpu_clk_vf_points_args *args) | 831 | struct nvgpu_gpu_clk_vf_points_args *args) |
@@ -1137,6 +1143,7 @@ static int nvgpu_gpu_clk_get_event_fd(struct gk20a *g, | |||
1137 | 1143 | ||
1138 | return nvgpu_clk_arb_install_event_fd(g, session, &args->event_fd); | 1144 | return nvgpu_clk_arb_install_event_fd(g, session, &args->event_fd); |
1139 | } | 1145 | } |
1146 | #endif | ||
1140 | 1147 | ||
1141 | long gk20a_ctrl_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) | 1148 | long gk20a_ctrl_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) |
1142 | { | 1149 | { |
@@ -1400,6 +1407,7 @@ long gk20a_ctrl_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg | |||
1400 | (struct nvgpu_gpu_get_memory_state_args *)buf); | 1407 | (struct nvgpu_gpu_get_memory_state_args *)buf); |
1401 | break; | 1408 | break; |
1402 | 1409 | ||
1410 | #ifdef CONFIG_ARCH_TEGRA_18x_SOC | ||
1403 | case NVGPU_GPU_IOCTL_CLK_GET_RANGE: | 1411 | case NVGPU_GPU_IOCTL_CLK_GET_RANGE: |
1404 | err = nvgpu_gpu_clk_get_range(g, priv, | 1412 | err = nvgpu_gpu_clk_get_range(g, priv, |
1405 | (struct nvgpu_gpu_clk_range_args *)buf); | 1413 | (struct nvgpu_gpu_clk_range_args *)buf); |
@@ -1424,6 +1432,7 @@ long gk20a_ctrl_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg | |||
1424 | err = nvgpu_gpu_clk_get_event_fd(g, priv, | 1432 | err = nvgpu_gpu_clk_get_event_fd(g, priv, |
1425 | (struct nvgpu_gpu_clk_get_event_fd_args *)buf); | 1433 | (struct nvgpu_gpu_clk_get_event_fd_args *)buf); |
1426 | break; | 1434 | break; |
1435 | #endif | ||
1427 | 1436 | ||
1428 | default: | 1437 | default: |
1429 | dev_dbg(dev_from_gk20a(g), "unrecognized gpu ioctl cmd: 0x%x", cmd); | 1438 | dev_dbg(dev_from_gk20a(g), "unrecognized gpu ioctl cmd: 0x%x", cmd); |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c index 03bbf72f..8a1df1cc 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gk20a.c | |||
@@ -972,13 +972,13 @@ int gk20a_pm_finalize_poweron(struct device *dev) | |||
972 | goto done; | 972 | goto done; |
973 | } | 973 | } |
974 | } | 974 | } |
975 | #endif | ||
976 | 975 | ||
977 | err = nvgpu_clk_arb_init_arbiter(g); | 976 | err = nvgpu_clk_arb_init_arbiter(g); |
978 | if (err) { | 977 | if (err) { |
979 | gk20a_err(dev, "failed to init clk arb"); | 978 | gk20a_err(dev, "failed to init clk arb"); |
980 | goto done; | 979 | goto done; |
981 | } | 980 | } |
981 | #endif | ||
982 | 982 | ||
983 | if (g->ops.pmu.is_pmu_supported(g)) { | 983 | if (g->ops.pmu.is_pmu_supported(g)) { |
984 | err = gk20a_init_pmu_support(g); | 984 | err = gk20a_init_pmu_support(g); |
@@ -1650,7 +1650,9 @@ static int __exit gk20a_remove(struct platform_device *pdev) | |||
1650 | if (platform->has_ce) | 1650 | if (platform->has_ce) |
1651 | gk20a_ce_destroy(g); | 1651 | gk20a_ce_destroy(g); |
1652 | 1652 | ||
1653 | #ifdef CONFIG_ARCH_TEGRA_18x_SOC | ||
1653 | nvgpu_clk_arb_cleanup_arbiter(g); | 1654 | nvgpu_clk_arb_cleanup_arbiter(g); |
1655 | #endif | ||
1654 | 1656 | ||
1655 | gk20a_user_deinit(dev, &nvgpu_class); | 1657 | gk20a_user_deinit(dev, &nvgpu_class); |
1656 | 1658 | ||