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authorTerje Bergstrom <tbergstrom@nvidia.com>2017-11-10 13:26:41 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-11-15 16:26:15 -0500
commit44f8b11f47bc31aafd0e3d2486125e1d87725fd4 (patch)
treedb041826c9aa327579a2542e6833270cee785a07 /drivers/gpu/nvgpu/gk20a
parent1f28b429a2fb73a260e0c9fe112dbbc6981ef4b4 (diff)
gpu: nvgpu: Remove GPU characteristics from gk20a
Remove a global copy of GPU characteristics in struct gk20a. Instead fill it at the Linux implementation of GPU characteristics IOCTL. JIRA NVGPU-388 Change-Id: Idc4ad58301d44a554777f5b969f3191a342e73fd Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1597330 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.c48
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h2
2 files changed, 0 insertions, 50 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c
index 8f67da69..5dc60917 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.c
@@ -381,20 +381,6 @@ int gk20a_wait_for_idle(struct gk20a *g)
381 381
382int gk20a_init_gpu_characteristics(struct gk20a *g) 382int gk20a_init_gpu_characteristics(struct gk20a *g)
383{ 383{
384 struct nvgpu_gpu_characteristics *gpu = &g->gpu_characteristics;
385
386 gpu->L2_cache_size = g->ops.ltc.determine_L2_size_bytes(g);
387 gpu->on_board_video_memory_size = 0; /* integrated GPU */
388
389 gpu->num_gpc = g->gr.gpc_count;
390 gpu->max_gpc_count = g->gr.max_gpc_count;
391
392 gpu->num_tpc_per_gpc = g->gr.max_tpc_per_gpc_count;
393
394 gpu->bus_type = NVGPU_GPU_BUS_TYPE_AXI; /* always AXI for now */
395
396 gpu->compression_page_size = g->ops.fb.compression_page_size(g);
397
398 __nvgpu_set_enabled(g, NVGPU_SUPPORT_PARTIAL_MAPPINGS, true); 384 __nvgpu_set_enabled(g, NVGPU_SUPPORT_PARTIAL_MAPPINGS, true);
399 __nvgpu_set_enabled(g, NVGPU_SUPPORT_MAP_DIRECT_KIND_CTRL, true); 385 __nvgpu_set_enabled(g, NVGPU_SUPPORT_MAP_DIRECT_KIND_CTRL, true);
400 __nvgpu_set_enabled(g, NVGPU_SUPPORT_MAP_BUFFER_BATCH, true); 386 __nvgpu_set_enabled(g, NVGPU_SUPPORT_MAP_BUFFER_BATCH, true);
@@ -436,46 +422,12 @@ int gk20a_init_gpu_characteristics(struct gk20a *g)
436 if (g->ops.clk_arb.get_arbiter_clk_domains) 422 if (g->ops.clk_arb.get_arbiter_clk_domains)
437 __nvgpu_set_enabled(g, NVGPU_SUPPORT_CLOCK_CONTROLS, true); 423 __nvgpu_set_enabled(g, NVGPU_SUPPORT_CLOCK_CONTROLS, true);
438 424
439 gpu->gpc_mask = (1 << g->gr.gpc_count)-1;
440
441 g->ops.gr.detect_sm_arch(g); 425 g->ops.gr.detect_sm_arch(g);
442 426
443 if (g->ops.gr.init_cyclestats) 427 if (g->ops.gr.init_cyclestats)
444 g->ops.gr.init_cyclestats(g); 428 g->ops.gr.init_cyclestats(g);
445 429
446 gpu->gpu_ioctl_nr_last = NVGPU_GPU_IOCTL_LAST;
447 gpu->tsg_ioctl_nr_last = NVGPU_TSG_IOCTL_LAST;
448 gpu->dbg_gpu_ioctl_nr_last = NVGPU_DBG_GPU_IOCTL_LAST;
449 gpu->ioctl_channel_nr_last = NVGPU_IOCTL_CHANNEL_LAST;
450 gpu->as_ioctl_nr_last = NVGPU_AS_IOCTL_LAST;
451 gpu->event_ioctl_nr_last = NVGPU_EVENT_IOCTL_LAST;
452 gpu->gpu_va_bit_count = 40;
453
454 strlcpy(gpu->chipname, g->name, sizeof(gpu->chipname));
455 gpu->max_fbps_count = g->ops.gr.get_max_fbps_count(g);
456 gpu->fbp_en_mask = g->ops.gr.get_fbp_en_mask(g);
457 gpu->max_ltc_per_fbp = g->ops.gr.get_max_ltc_per_fbp(g);
458 gpu->max_lts_per_ltc = g->ops.gr.get_max_lts_per_ltc(g);
459 g->ops.gr.get_rop_l2_en_mask(g); 430 g->ops.gr.get_rop_l2_en_mask(g);
460 gpu->gr_compbit_store_base_hw = g->gr.compbit_store.base_hw;
461 gpu->gr_gobs_per_comptagline_per_slice =
462 g->gr.gobs_per_comptagline_per_slice;
463 gpu->num_ltc = g->ltc_count;
464 gpu->lts_per_ltc = g->gr.slices_per_ltc;
465 gpu->cbc_cache_line_size = g->gr.cacheline_size;
466 gpu->cbc_comptags_per_line = g->gr.comptags_per_cacheline;
467
468 if (g->ops.clk.get_maxrate)
469 gpu->max_freq = g->ops.clk.get_maxrate(g, CTRL_CLK_DOMAIN_GPCCLK);
470
471 gpu->local_video_memory_size = g->mm.vidmem.size;
472
473 gpu->pci_vendor_id = g->pci_vendor_id;
474 gpu->pci_device_id = g->pci_device_id;
475 gpu->pci_subsystem_vendor_id = g->pci_subsystem_vendor_id;
476 gpu->pci_subsystem_device_id = g->pci_subsystem_device_id;
477 gpu->pci_class = g->pci_class;
478 gpu->pci_revision = g->pci_revision;
479 431
480 return 0; 432 return 0;
481} 433}
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 3381d974..09597bb2 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -1225,8 +1225,6 @@ struct gk20a {
1225 1225
1226 struct nvgpu_spinlock mc_enable_lock; 1226 struct nvgpu_spinlock mc_enable_lock;
1227 1227
1228 struct nvgpu_gpu_characteristics gpu_characteristics;
1229
1230 struct gk20a_as as; 1228 struct gk20a_as as;
1231 1229
1232 struct nvgpu_mutex client_lock; 1230 struct nvgpu_mutex client_lock;