gpu: nvgpu: define runlist level in common code

All the runlist levels NVGPU_RUNLIST_INTERLEAVE_LEVEL_* are declared in linux
specific uapi header and used in common code
But since common code should be linux-independent, move these uses out of
common code

Define new runlist levels NVGPU_FIFO_RUNLIST_INTERLEAVE_LEVEL_* in common code
and use them wherever required

Add new API nvgpu_get_common_runlist_level() to get common runlist level of
the form NVGPU_FIFO_RUNLIST_INTERLEAVE_LEVEL_* from linux specific runlist
level of the form NVGPU_RUNLIST_INTERLEAVE_LEVEL_*

Jira NVGPU-259

Change-Id: Ic19239f0f8275683d5d1b981df530acd90e6dfbb
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1594327
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

4 files changed, 19 insertions, 12 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
index 6c607ae2..229e3782 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
@@ -322,9 +322,9 @@ int gk20a_channel_set_runlist_interleave(struct channel_gk20a *ch,
         }
 
         switch (level) {
-        case NVGPU_RUNLIST_INTERLEAVE_LEVEL_LOW:
-        case NVGPU_RUNLIST_INTERLEAVE_LEVEL_MEDIUM:
-        case NVGPU_RUNLIST_INTERLEAVE_LEVEL_HIGH:
+        case NVGPU_FIFO_RUNLIST_INTERLEAVE_LEVEL_LOW:
+        case NVGPU_FIFO_RUNLIST_INTERLEAVE_LEVEL_MEDIUM:
+        case NVGPU_FIFO_RUNLIST_INTERLEAVE_LEVEL_HIGH:
                 ret = g->ops.fifo.set_runlist_interleave(g, ch->chid,
                                                         false, 0, level);
                 break;
@@ -858,7 +858,7 @@ struct channel_gk20a *gk20a_open_new_channel(struct gk20a *g,
         ch->has_timedout = false;
         ch->wdt_enabled = true;
         ch->obj_class = 0;
-        ch->interleave_level = NVGPU_RUNLIST_INTERLEAVE_LEVEL_LOW;
+        ch->interleave_level = NVGPU_FIFO_RUNLIST_INTERLEAVE_LEVEL_LOW;
         ch->timeslice_us = g->timeslice_low_priority_us;
 #ifdef CONFIG_TEGRA_19x_GPU
         memset(&ch->t19x, 0, sizeof(struct channel_t19x));
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index 76995406..061ceba1 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -3048,7 +3048,7 @@ static u32 *gk20a_runlist_construct_locked(struct fifo_gk20a *f,
                                 bool prev_empty,
                                 u32 *entries_left)
 {
-        bool last_level = cur_level == NVGPU_RUNLIST_INTERLEAVE_LEVEL_HIGH;
+        bool last_level = cur_level == NVGPU_FIFO_RUNLIST_INTERLEAVE_LEVEL_HIGH;
         struct channel_gk20a *ch;
         bool skip_next = false;
         u32 chid, tsgid, count = 0;
@@ -4081,13 +4081,13 @@ u32 gk20a_fifo_pbdma_acquire_val(u64 timeout)
 const char *gk20a_fifo_interleave_level_name(u32 interleave_level)
 {
         switch (interleave_level) {
-        case NVGPU_RUNLIST_INTERLEAVE_LEVEL_LOW:
+        case NVGPU_FIFO_RUNLIST_INTERLEAVE_LEVEL_LOW:
                 return "LOW";
 
-        case NVGPU_RUNLIST_INTERLEAVE_LEVEL_MEDIUM:
+        case NVGPU_FIFO_RUNLIST_INTERLEAVE_LEVEL_MEDIUM:
                 return "MEDIUM";
 
-        case NVGPU_RUNLIST_INTERLEAVE_LEVEL_HIGH:
+        case NVGPU_FIFO_RUNLIST_INTERLEAVE_LEVEL_HIGH:
                 return "HIGH";
 
         default:
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
index ea5d55a4..4c967e80 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
@@ -38,6 +38,13 @@
 struct gk20a_debug_output;
 struct mmu_fault_info;
 
+enum {
+        NVGPU_FIFO_RUNLIST_INTERLEAVE_LEVEL_LOW = 0,
+        NVGPU_FIFO_RUNLIST_INTERLEAVE_LEVEL_MEDIUM,
+        NVGPU_FIFO_RUNLIST_INTERLEAVE_LEVEL_HIGH,
+        NVGPU_FIFO_RUNLIST_INTERLEAVE_NUM_LEVELS,
+};
+
 #define MAX_RUNLIST_BUFFERS             2
 
 #define FIFO_INVAL_ENGINE_ID            ((u32)~0)
diff --git a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
index badc7ef9..640174a6 100644
--- a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
@@ -229,9 +229,9 @@ int gk20a_tsg_set_runlist_interleave(struct tsg_gk20a *tsg, u32 level)
         gk20a_dbg(gpu_dbg_sched, "tsgid=%u interleave=%u", tsg->tsgid, level);
 
         switch (level) {
-        case NVGPU_RUNLIST_INTERLEAVE_LEVEL_LOW:
-        case NVGPU_RUNLIST_INTERLEAVE_LEVEL_MEDIUM:
-        case NVGPU_RUNLIST_INTERLEAVE_LEVEL_HIGH:
+        case NVGPU_FIFO_RUNLIST_INTERLEAVE_LEVEL_LOW:
+        case NVGPU_FIFO_RUNLIST_INTERLEAVE_LEVEL_MEDIUM:
+        case NVGPU_FIFO_RUNLIST_INTERLEAVE_LEVEL_HIGH:
                 ret = g->ops.fifo.set_runlist_interleave(g, tsg->tsgid,
                                                         true, 0, level);
                 if (!ret)
@@ -304,7 +304,7 @@ struct tsg_gk20a *gk20a_tsg_open(struct gk20a *g)
 
         tsg->tsg_gr_ctx = NULL;
         tsg->vm = NULL;
-        tsg->interleave_level = NVGPU_RUNLIST_INTERLEAVE_LEVEL_LOW;
+        tsg->interleave_level = NVGPU_FIFO_RUNLIST_INTERLEAVE_LEVEL_LOW;
         tsg->timeslice_us = 0;
         tsg->timeslice_timeout = 0;
         tsg->timeslice_scale = 0;