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author | seshendra Gadagottu <sgadagottu@nvidia.com> | 2017-06-29 19:01:17 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-07-05 18:40:24 -0400 |
commit | 3afac13d66ee7026555c0b0558d898a4f189b051 (patch) | |
tree | 01ccaf764036ea074c1b96edb348150b3da4170b /drivers/gpu/nvgpu/gk20a | |
parent | a3802a2ae9d5ffeaec038a9ce7fc9fa333f1a68c (diff) |
gpu: nvgpu: add support for t19x tsg/channel
Required modifications to add t19x channel
specific info and handle t19x tsg requests.
Bug 1842197
Change-Id: I0f8bcce20edea8f2f9a01e5bf5a9e4181af54875
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master/r/1511144
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/channel_gk20a.c | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/channel_gk20a.h | 6 |
2 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c index bca201cf..87923537 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c | |||
@@ -858,6 +858,10 @@ struct channel_gk20a *gk20a_open_new_channel(struct gk20a *g, | |||
858 | ch->obj_class = 0; | 858 | ch->obj_class = 0; |
859 | ch->interleave_level = NVGPU_RUNLIST_INTERLEAVE_LEVEL_LOW; | 859 | ch->interleave_level = NVGPU_RUNLIST_INTERLEAVE_LEVEL_LOW; |
860 | ch->timeslice_us = g->timeslice_low_priority_us; | 860 | ch->timeslice_us = g->timeslice_low_priority_us; |
861 | #ifdef CONFIG_TEGRA_19x_GPU | ||
862 | memset(&ch->t19x, 0, sizeof(struct channel_t19x)); | ||
863 | #endif | ||
864 | |||
861 | 865 | ||
862 | /* The channel is *not* runnable at this point. It still needs to have | 866 | /* The channel is *not* runnable at this point. It still needs to have |
863 | * an address space bound and allocate a gpfifo and grctx. */ | 867 | * an address space bound and allocate a gpfifo and grctx. */ |
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h index 380440b9..46a9b0a7 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h | |||
@@ -36,6 +36,9 @@ struct fifo_profile_gk20a; | |||
36 | #include "mm_gk20a.h" | 36 | #include "mm_gk20a.h" |
37 | #include "gr_gk20a.h" | 37 | #include "gr_gk20a.h" |
38 | #include "fence_gk20a.h" | 38 | #include "fence_gk20a.h" |
39 | #ifdef CONFIG_TEGRA_19x_GPU | ||
40 | #include "channel_t19x.h" | ||
41 | #endif | ||
39 | 42 | ||
40 | struct notification { | 43 | struct notification { |
41 | struct { | 44 | struct { |
@@ -276,6 +279,9 @@ struct channel_gk20a { | |||
276 | u32 runlist_id; | 279 | u32 runlist_id; |
277 | 280 | ||
278 | bool is_privileged_channel; | 281 | bool is_privileged_channel; |
282 | #ifdef CONFIG_TEGRA_19x_GPU | ||
283 | struct channel_t19x t19x; | ||
284 | #endif | ||
279 | }; | 285 | }; |
280 | 286 | ||
281 | static inline struct channel_gk20a * | 287 | static inline struct channel_gk20a * |