gpu: nvgpu: changes related to preemption

Added function pointers to check chip specific valid
gfx class and compute class. Also added function pointer
to update ctx header with preemption buffer pointers.

Bug 200292090

Change-Id: I8119ee082e2abb67186a8ac07088f8db7f410ba1
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1293502
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

2 files changed, 22 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index c8d06b4f..96ca69a3 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -194,6 +194,8 @@ struct gpu_ops {
                 void (*set_circular_buffer_size)(struct gk20a *g, u32 data);
                 void (*enable_hww_exceptions)(struct gk20a *g);
                 bool (*is_valid_class)(struct gk20a *g, u32 class_num);
+                bool (*is_valid_gfx_class)(struct gk20a *g, u32 class_num);
+                bool (*is_valid_compute_class)(struct gk20a *g, u32 class_num);
                 void (*get_sm_dsm_perf_regs)(struct gk20a *g,
                                                   u32 *num_sm_dsm_perf_regs,
                                                   u32 **sm_dsm_perf_regs,
@@ -354,6 +356,8 @@ struct gpu_ops {
                                         struct nvgpu_mem *mem, u64 gpu_va);
                 void (*write_pm_ptr)(struct gk20a *g,
                                         struct nvgpu_mem *mem, u64 gpu_va);
+                void (*write_preemption_ptr)(struct gk20a *g,
+                                        struct nvgpu_mem *mem, u64 gpu_va);
                 void (*init_elcg_mode)(struct gk20a *g, u32 mode, u32 engine);
                 void (*load_tpc_mask)(struct gk20a *g);
                 int (*inval_icache)(struct gk20a *g, struct channel_gk20a *ch);
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 3140c285..77a947de 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -3113,6 +3113,22 @@ static bool gr_gk20a_is_valid_class(struct gk20a *g, u32 class_num)
         return valid;
 }
 
+static bool gr_gk20a_is_valid_gfx_class(struct gk20a *g, u32 class_num)
+{
+        if (class_num == KEPLER_C)
+                return true;
+        else
+                return false;
+}
+
+static bool gr_gk20a_is_valid_compute_class(struct gk20a *g, u32 class_num)
+{
+        if (class_num == KEPLER_COMPUTE_A)
+                return true;
+        else
+                return false;
+}
+
 int gk20a_alloc_obj_ctx(struct channel_gk20a  *c,
                         struct nvgpu_alloc_obj_ctx_args *args)
 {
@@ -9462,6 +9478,8 @@ void gk20a_init_gr_ops(struct gpu_ops *gops)
                 gk20a_gr_set_alpha_circular_buffer_size;
         gops->gr.enable_hww_exceptions = gr_gk20a_enable_hww_exceptions;
         gops->gr.is_valid_class = gr_gk20a_is_valid_class;
+        gops->gr.is_valid_gfx_class = gr_gk20a_is_valid_gfx_class;
+        gops->gr.is_valid_compute_class = gr_gk20a_is_valid_compute_class;
         gops->gr.get_sm_dsm_perf_regs = gr_gk20a_get_sm_dsm_perf_regs;
         gops->gr.get_sm_dsm_perf_ctrl_regs = gr_gk20a_get_sm_dsm_perf_ctrl_regs;
         gops->gr.init_fs_state = gr_gk20a_init_fs_state;