diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-12-20 18:14:16 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-01-04 04:44:24 -0500 |
commit | 2a95a288b285b0eff16a8825298c416d185693fb (patch) | |
tree | 8040b60aa5761b638f08cc1032feb0f729ed57ae /drivers/gpu/nvgpu/gk20a | |
parent | fef7083e516ff6da4681ea8aaeedc114c6f2c821 (diff) |
gpu: nvgpu: Check reference clock before use
We use GPU reference clock as a divider. Check before division that
reference clock is not zero.
Change-Id: Ie453a78b422b2e740daeb7c12ce5b06faa52ba76
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1275743
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/clk_gk20a.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/clk_gk20a.c b/drivers/gpu/nvgpu/gk20a/clk_gk20a.c index 2c4f1bf4..34f3f886 100644 --- a/drivers/gpu/nvgpu/gk20a/clk_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/clk_gk20a.c | |||
@@ -439,6 +439,11 @@ static int gk20a_init_clk_setup_sw(struct gk20a *g) | |||
439 | 439 | ||
440 | clk->gpc_pll.id = GK20A_GPC_PLL; | 440 | clk->gpc_pll.id = GK20A_GPC_PLL; |
441 | clk->gpc_pll.clk_in = ref_rate / KHZ; | 441 | clk->gpc_pll.clk_in = ref_rate / KHZ; |
442 | if (clk->gpc_pll.clk_in == 0) { | ||
443 | gk20a_err(dev_from_gk20a(g), | ||
444 | "GPCPLL reference clock is zero"); | ||
445 | return -EINVAL; | ||
446 | } | ||
442 | 447 | ||
443 | /* Decide initial frequency */ | 448 | /* Decide initial frequency */ |
444 | if (!initialized) { | 449 | if (!initialized) { |