diff options
author | Deepak Nibade <dnibade@nvidia.com> | 2018-09-04 07:07:33 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-09-05 23:41:36 -0400 |
commit | 2998ab4e0a0b19da1332b82d779bd17b4e284b38 (patch) | |
tree | e86e3201c1920f8cb0afecdb6e21f9c0bf8de366 /drivers/gpu/nvgpu/gk20a | |
parent | 2b2bde04e14135cae5f7433c755e6b8d70f88abb (diff) |
gpu: nvgpu: remove unused regops HALs
Below regops HALs are not being called from anywhere, so remove them
gops.regops.get_runcontrol_whitelist_ranges()
gops.regops.get_runcontrol_whitelist_ranges_count()
gops.regops.get_qctl_whitelist_ranges()
gops.regops.get_qctl_whitelist_ranges_count()
HAL gops.regops.apply_smpc_war() is unimplemented for all the chips, and it
was originally only needed for gk20a which is not unsupported
So remove this HAL and its call too
Jira NVGPU-620
Change-Id: Ia2c74883cd647a2e94ee740ffd040a40c442b939
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1813106
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index fac7c5df..4d4b4cb1 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -1140,15 +1140,8 @@ struct gpu_ops { | |||
1140 | u64 (*get_context_whitelist_ranges_count)(void); | 1140 | u64 (*get_context_whitelist_ranges_count)(void); |
1141 | const u32* (*get_runcontrol_whitelist)(void); | 1141 | const u32* (*get_runcontrol_whitelist)(void); |
1142 | u64 (*get_runcontrol_whitelist_count)(void); | 1142 | u64 (*get_runcontrol_whitelist_count)(void); |
1143 | const struct regop_offset_range* ( | ||
1144 | *get_runcontrol_whitelist_ranges)(void); | ||
1145 | u64 (*get_runcontrol_whitelist_ranges_count)(void); | ||
1146 | const u32* (*get_qctl_whitelist)(void); | 1143 | const u32* (*get_qctl_whitelist)(void); |
1147 | u64 (*get_qctl_whitelist_count)(void); | 1144 | u64 (*get_qctl_whitelist_count)(void); |
1148 | const struct regop_offset_range* ( | ||
1149 | *get_qctl_whitelist_ranges)(void); | ||
1150 | u64 (*get_qctl_whitelist_ranges_count)(void); | ||
1151 | int (*apply_smpc_war)(struct dbg_session_gk20a *dbg_s); | ||
1152 | } regops; | 1145 | } regops; |
1153 | struct { | 1146 | struct { |
1154 | void (*intr_mask)(struct gk20a *g); | 1147 | void (*intr_mask)(struct gk20a *g); |