diff options
author | Deepak Nibade <dnibade@nvidia.com> | 2017-10-31 09:11:57 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-11-02 13:26:21 -0400 |
commit | 25440e63d2dfd329ba35aec48f11f0c20b18cdbd (patch) | |
tree | d66fe69181c8d54dd3fb0deefa018558e4359e0b /drivers/gpu/nvgpu/gk20a | |
parent | 2d71b3efaebb9807cb039979f1ce7dc621fb658f (diff) |
gpu: nvgpu: move platform_gk20a.h to linux
Move gk20a/platform_gk20a.h to linux specific directory as
common/linux/platform_gk20a.h since this file includes all linux specific
stuff
Fix #includes in all the files to include this file with correct path
Remove #include of this file where it is no more needed
Fix gk20a_init_sim_support() to receive struct gk20a as parameter
instead of receiving linux specific struct platform_device
NVGPU-316
Change-Id: I5ec08e776b753af4d39d11c11f6f068be2ac236f
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1589938
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/mm_gk20a.c | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/platform_gk20a.h | 302 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/platform_vgpu_tegra.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/sim_gk20a.c | 5 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/sim_gk20a.h | 2 |
6 files changed, 3 insertions, 310 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c index 802ccd76..f70cfdf8 100644 --- a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c | |||
@@ -29,7 +29,6 @@ | |||
29 | #include <nvgpu/mm.h> | 29 | #include <nvgpu/mm.h> |
30 | 30 | ||
31 | #include "gk20a.h" | 31 | #include "gk20a.h" |
32 | #include "gk20a/platform_gk20a.h" | ||
33 | #include "gr_gk20a.h" | 32 | #include "gr_gk20a.h" |
34 | #include "dbg_gpu_gk20a.h" | 33 | #include "dbg_gpu_gk20a.h" |
35 | #include "regops_gk20a.h" | 34 | #include "regops_gk20a.h" |
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c index cb0c015e..d54e8d43 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c | |||
@@ -41,7 +41,6 @@ | |||
41 | #include <nvgpu/vidmem.h> | 41 | #include <nvgpu/vidmem.h> |
42 | 42 | ||
43 | #include "gk20a.h" | 43 | #include "gk20a.h" |
44 | #include "platform_gk20a.h" | ||
45 | #include "mm_gk20a.h" | 44 | #include "mm_gk20a.h" |
46 | #include "fence_gk20a.h" | 45 | #include "fence_gk20a.h" |
47 | #include "kind_gk20a.h" | 46 | #include "kind_gk20a.h" |
diff --git a/drivers/gpu/nvgpu/gk20a/platform_gk20a.h b/drivers/gpu/nvgpu/gk20a/platform_gk20a.h deleted file mode 100644 index d4ff17f3..00000000 --- a/drivers/gpu/nvgpu/gk20a/platform_gk20a.h +++ /dev/null | |||
@@ -1,302 +0,0 @@ | |||
1 | /* | ||
2 | * GK20A Platform (SoC) Interface | ||
3 | * | ||
4 | * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. | ||
5 | * | ||
6 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
7 | * copy of this software and associated documentation files (the "Software"), | ||
8 | * to deal in the Software without restriction, including without limitation | ||
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
10 | * and/or sell copies of the Software, and to permit persons to whom the | ||
11 | * Software is furnished to do so, subject to the following conditions: | ||
12 | * | ||
13 | * The above copyright notice and this permission notice shall be included in | ||
14 | * all copies or substantial portions of the Software. | ||
15 | * | ||
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
22 | * DEALINGS IN THE SOFTWARE. | ||
23 | */ | ||
24 | |||
25 | #ifndef _GK20A_PLATFORM_H_ | ||
26 | #define _GK20A_PLATFORM_H_ | ||
27 | |||
28 | #include <linux/device.h> | ||
29 | |||
30 | #include <nvgpu/lock.h> | ||
31 | |||
32 | #include "gk20a.h" | ||
33 | |||
34 | #define GK20A_CLKS_MAX 4 | ||
35 | |||
36 | struct gk20a; | ||
37 | struct channel_gk20a; | ||
38 | struct gr_ctx_buffer_desc; | ||
39 | struct gk20a_scale_profile; | ||
40 | |||
41 | struct secure_page_buffer { | ||
42 | void (*destroy)(struct gk20a *, struct secure_page_buffer *); | ||
43 | size_t size; | ||
44 | u64 iova; | ||
45 | }; | ||
46 | |||
47 | struct gk20a_platform { | ||
48 | /* Populated by the gk20a driver before probing the platform. */ | ||
49 | struct gk20a *g; | ||
50 | |||
51 | /* Should be populated at probe. */ | ||
52 | bool can_railgate_init; | ||
53 | |||
54 | /* Should be populated at probe. */ | ||
55 | bool can_elpg_init; | ||
56 | |||
57 | /* Should be populated at probe. */ | ||
58 | bool has_syncpoints; | ||
59 | |||
60 | /* channel limit after which to start aggressive sync destroy */ | ||
61 | unsigned int aggressive_sync_destroy_thresh; | ||
62 | |||
63 | /* flag to set sync destroy aggressiveness */ | ||
64 | bool aggressive_sync_destroy; | ||
65 | |||
66 | /* set if ASPM should be disabled on boot; only makes sense for PCI */ | ||
67 | bool disable_aspm; | ||
68 | |||
69 | /* Set if the platform can unify the small/large address spaces. */ | ||
70 | bool unify_address_spaces; | ||
71 | |||
72 | /* Clock configuration is stored here. Platform probe is responsible | ||
73 | * for filling this data. */ | ||
74 | struct clk *clk[GK20A_CLKS_MAX]; | ||
75 | int num_clks; | ||
76 | |||
77 | #ifdef CONFIG_RESET_CONTROLLER | ||
78 | /* Reset control for device */ | ||
79 | struct reset_control *reset_control; | ||
80 | #endif | ||
81 | |||
82 | /* Delay before rail gated */ | ||
83 | int railgate_delay_init; | ||
84 | |||
85 | /* Second Level Clock Gating: true = enable false = disable */ | ||
86 | bool enable_slcg; | ||
87 | |||
88 | /* Block Level Clock Gating: true = enable flase = disable */ | ||
89 | bool enable_blcg; | ||
90 | |||
91 | /* Engine Level Clock Gating: true = enable flase = disable */ | ||
92 | bool enable_elcg; | ||
93 | |||
94 | /* Should be populated at probe. */ | ||
95 | bool can_slcg; | ||
96 | |||
97 | /* Should be populated at probe. */ | ||
98 | bool can_blcg; | ||
99 | |||
100 | /* Should be populated at probe. */ | ||
101 | bool can_elcg; | ||
102 | |||
103 | /* Engine Level Power Gating: true = enable flase = disable */ | ||
104 | bool enable_elpg; | ||
105 | |||
106 | /* Adaptative ELPG: true = enable flase = disable */ | ||
107 | bool enable_aelpg; | ||
108 | |||
109 | /* PMU Perfmon: true = enable false = disable */ | ||
110 | bool enable_perfmon; | ||
111 | |||
112 | /* Memory System Clock Gating: true = enable flase = disable*/ | ||
113 | bool enable_mscg; | ||
114 | |||
115 | /* Timeout for per-channel watchdog (in mS) */ | ||
116 | u32 ch_wdt_timeout_ms; | ||
117 | |||
118 | /* Enable SMMU bypass by default */ | ||
119 | bool bypass_smmu; | ||
120 | |||
121 | /* Disable big page support */ | ||
122 | bool disable_bigpage; | ||
123 | |||
124 | /* | ||
125 | * gk20a_do_idle() API can take GPU either into rail gate or CAR reset | ||
126 | * This flag can be used to force CAR reset case instead of rail gate | ||
127 | */ | ||
128 | bool force_reset_in_do_idle; | ||
129 | |||
130 | /* default pri timeout, on PCIe it should be lower than timeout | ||
131 | * detection | ||
132 | */ | ||
133 | u32 default_pri_timeout; | ||
134 | |||
135 | /* Initialize the platform interface of the gk20a driver. | ||
136 | * | ||
137 | * The platform implementation of this function must | ||
138 | * - set the power and clocks of the gk20a device to a known | ||
139 | * state, and | ||
140 | * - populate the gk20a_platform structure (a pointer to the | ||
141 | * structure can be obtained by calling gk20a_get_platform). | ||
142 | * | ||
143 | * After this function is finished, the driver will initialise | ||
144 | * pm runtime and genpd based on the platform configuration. | ||
145 | */ | ||
146 | int (*probe)(struct device *dev); | ||
147 | |||
148 | /* Second stage initialisation - called once all power management | ||
149 | * initialisations are done. | ||
150 | */ | ||
151 | int (*late_probe)(struct device *dev); | ||
152 | |||
153 | /* Remove device after power management has been done | ||
154 | */ | ||
155 | int (*remove)(struct device *dev); | ||
156 | |||
157 | /* Poweron platform dependencies */ | ||
158 | int (*busy)(struct device *dev); | ||
159 | |||
160 | /* Powerdown platform dependencies */ | ||
161 | void (*idle)(struct device *dev); | ||
162 | |||
163 | struct secure_page_buffer secure_buffer; | ||
164 | |||
165 | /* Device is going to be suspended */ | ||
166 | int (*suspend)(struct device *); | ||
167 | |||
168 | /* Called to turn off the device */ | ||
169 | int (*railgate)(struct device *dev); | ||
170 | |||
171 | /* Called to turn on the device */ | ||
172 | int (*unrailgate)(struct device *dev); | ||
173 | struct nvgpu_mutex railgate_lock; | ||
174 | |||
175 | /* Called to check state of device */ | ||
176 | bool (*is_railgated)(struct device *dev); | ||
177 | |||
178 | /* get supported frequency list */ | ||
179 | int (*get_clk_freqs)(struct device *pdev, | ||
180 | unsigned long **freqs, int *num_freqs); | ||
181 | |||
182 | /* clk related supported functions */ | ||
183 | long (*clk_round_rate)(struct device *dev, | ||
184 | unsigned long rate); | ||
185 | |||
186 | /* Called to register GPCPLL with common clk framework */ | ||
187 | int (*clk_register)(struct gk20a *g); | ||
188 | |||
189 | /* Postscale callback is called after frequency change */ | ||
190 | void (*postscale)(struct device *dev, | ||
191 | unsigned long freq); | ||
192 | |||
193 | /* Pre callback is called before frequency change */ | ||
194 | void (*prescale)(struct device *dev); | ||
195 | |||
196 | /* Devfreq governor name. If scaling is enabled, we request | ||
197 | * this governor to be used in scaling */ | ||
198 | const char *devfreq_governor; | ||
199 | |||
200 | /* Quality of service notifier callback. If this is set, the scaling | ||
201 | * routines will register a callback to Qos. Each time we receive | ||
202 | * a new value, this callback gets called. */ | ||
203 | int (*qos_notify)(struct notifier_block *nb, | ||
204 | unsigned long n, void *p); | ||
205 | |||
206 | /* Called as part of debug dump. If the gpu gets hung, this function | ||
207 | * is responsible for delivering all necessary debug data of other | ||
208 | * hw units which may interact with the gpu without direct supervision | ||
209 | * of the CPU. | ||
210 | */ | ||
211 | void (*dump_platform_dependencies)(struct device *dev); | ||
212 | |||
213 | /* Callbacks to assert/deassert GPU reset */ | ||
214 | int (*reset_assert)(struct device *dev); | ||
215 | int (*reset_deassert)(struct device *dev); | ||
216 | struct clk *clk_reset; | ||
217 | struct dvfs_rail *gpu_rail; | ||
218 | |||
219 | bool virtual_dev; | ||
220 | #ifdef CONFIG_TEGRA_GR_VIRTUALIZATION | ||
221 | void *vgpu_priv; | ||
222 | #endif | ||
223 | /* source frequency for ptimer in hz */ | ||
224 | u32 ptimer_src_freq; | ||
225 | |||
226 | bool has_cde; | ||
227 | |||
228 | /* soc name for finding firmware files */ | ||
229 | const char *soc_name; | ||
230 | |||
231 | /* false if vidmem aperture actually points to sysmem */ | ||
232 | bool honors_aperture; | ||
233 | /* unified or split memory with separate vidmem? */ | ||
234 | bool unified_memory; | ||
235 | |||
236 | /* true if all channels must be in TSG */ | ||
237 | bool tsg_required; | ||
238 | |||
239 | /* minimum supported VBIOS version */ | ||
240 | u32 vbios_min_version; | ||
241 | |||
242 | /* true if we run preos microcode on this board */ | ||
243 | bool run_preos; | ||
244 | |||
245 | /* true if we need to program sw threshold for | ||
246 | * power limits | ||
247 | */ | ||
248 | bool hardcode_sw_threshold; | ||
249 | |||
250 | /* i2c device index, port and address for INA3221 */ | ||
251 | u32 ina3221_dcb_index; | ||
252 | u32 ina3221_i2c_address; | ||
253 | u32 ina3221_i2c_port; | ||
254 | }; | ||
255 | |||
256 | static inline struct gk20a_platform *gk20a_get_platform( | ||
257 | struct device *dev) | ||
258 | { | ||
259 | return (struct gk20a_platform *)dev_get_drvdata(dev); | ||
260 | } | ||
261 | |||
262 | #ifdef CONFIG_TEGRA_GK20A | ||
263 | extern struct gk20a_platform gm20b_tegra_platform; | ||
264 | extern struct gk20a_platform gp10b_tegra_platform; | ||
265 | #ifdef CONFIG_TEGRA_GR_VIRTUALIZATION | ||
266 | extern struct gk20a_platform vgpu_tegra_platform; | ||
267 | #endif | ||
268 | #endif | ||
269 | |||
270 | int gk20a_tegra_busy(struct device *dev); | ||
271 | void gk20a_tegra_idle(struct device *dev); | ||
272 | void gk20a_tegra_debug_dump(struct device *pdev); | ||
273 | |||
274 | static inline struct gk20a *get_gk20a(struct device *dev) | ||
275 | { | ||
276 | return gk20a_get_platform(dev)->g; | ||
277 | } | ||
278 | static inline struct gk20a *gk20a_from_dev(struct device *dev) | ||
279 | { | ||
280 | if (!dev) | ||
281 | return NULL; | ||
282 | |||
283 | return ((struct gk20a_platform *)dev_get_drvdata(dev))->g; | ||
284 | } | ||
285 | static inline bool gk20a_gpu_is_virtual(struct device *dev) | ||
286 | { | ||
287 | struct gk20a_platform *platform = dev_get_drvdata(dev); | ||
288 | |||
289 | return platform->virtual_dev; | ||
290 | } | ||
291 | |||
292 | static inline int support_gk20a_pmu(struct device *dev) | ||
293 | { | ||
294 | if (IS_ENABLED(CONFIG_GK20A_PMU)) { | ||
295 | /* gPMU is not supported for vgpu */ | ||
296 | return !gk20a_gpu_is_virtual(dev); | ||
297 | } | ||
298 | |||
299 | return 0; | ||
300 | } | ||
301 | |||
302 | #endif | ||
diff --git a/drivers/gpu/nvgpu/gk20a/platform_vgpu_tegra.c b/drivers/gpu/nvgpu/gk20a/platform_vgpu_tegra.c index 90a37c47..6209188c 100644 --- a/drivers/gpu/nvgpu/gk20a/platform_vgpu_tegra.c +++ b/drivers/gpu/nvgpu/gk20a/platform_vgpu_tegra.c | |||
@@ -23,7 +23,7 @@ | |||
23 | */ | 23 | */ |
24 | 24 | ||
25 | #include "gk20a.h" | 25 | #include "gk20a.h" |
26 | #include "platform_gk20a.h" | 26 | #include "common/linux/platform_gk20a.h" |
27 | #include "vgpu/clk_vgpu.h" | 27 | #include "vgpu/clk_vgpu.h" |
28 | 28 | ||
29 | #include <nvgpu/nvhost.h> | 29 | #include <nvgpu/nvhost.h> |
diff --git a/drivers/gpu/nvgpu/gk20a/sim_gk20a.c b/drivers/gpu/nvgpu/gk20a/sim_gk20a.c index 34ca5add..ab064710 100644 --- a/drivers/gpu/nvgpu/gk20a/sim_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/sim_gk20a.c | |||
@@ -28,7 +28,6 @@ | |||
28 | #include <nvgpu/linux/vm.h> | 28 | #include <nvgpu/linux/vm.h> |
29 | 29 | ||
30 | #include "gk20a.h" | 30 | #include "gk20a.h" |
31 | #include "platform_gk20a.h" | ||
32 | 31 | ||
33 | #include <nvgpu/hw/gk20a/hw_sim_gk20a.h> | 32 | #include <nvgpu/hw/gk20a/hw_sim_gk20a.h> |
34 | 33 | ||
@@ -104,11 +103,9 @@ static int alloc_and_kmap_iopage(struct gk20a *g, | |||
104 | 103 | ||
105 | } | 104 | } |
106 | 105 | ||
107 | int gk20a_init_sim_support(struct platform_device *pdev) | 106 | int gk20a_init_sim_support(struct gk20a *g) |
108 | { | 107 | { |
109 | int err = 0; | 108 | int err = 0; |
110 | struct device *dev = &pdev->dev; | ||
111 | struct gk20a *g = get_gk20a(dev); | ||
112 | u64 phys; | 109 | u64 phys; |
113 | 110 | ||
114 | /* allocate sim event/msg buffers */ | 111 | /* allocate sim event/msg buffers */ |
diff --git a/drivers/gpu/nvgpu/gk20a/sim_gk20a.h b/drivers/gpu/nvgpu/gk20a/sim_gk20a.h index 17e508de..44378e7a 100644 --- a/drivers/gpu/nvgpu/gk20a/sim_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/sim_gk20a.h | |||
@@ -45,7 +45,7 @@ struct sim_gk20a { | |||
45 | void (*remove_support)(struct sim_gk20a *); | 45 | void (*remove_support)(struct sim_gk20a *); |
46 | }; | 46 | }; |
47 | 47 | ||
48 | int gk20a_init_sim_support(struct platform_device *pdev); | 48 | int gk20a_init_sim_support(struct gk20a *g); |
49 | int gk20a_sim_esc_readl(struct gk20a *g, char *path, u32 index, u32 *data); | 49 | int gk20a_sim_esc_readl(struct gk20a *g, char *path, u32 index, u32 *data); |
50 | 50 | ||
51 | #endif /*__SIM_GK20A_H__*/ | 51 | #endif /*__SIM_GK20A_H__*/ |