diff options
author | Ken Adams <kadams@nvidia.com> | 2014-04-21 21:21:09 -0400 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:09:42 -0400 |
commit | 0f2498ca09ed5642207e42560c9e89faebf2f455 (patch) | |
tree | 395f5bb182b30123cd41911488f93bf611d69543 /drivers/gpu/nvgpu/gk20a | |
parent | a9f75f87937a2d9ad88bbd992ee3d5c91c18c260 (diff) |
gpu: nvgpu: gk20a, gm20b headers
update headers from latest gen_register/ip_check info
Change-Id: Iae892ab7138e7bba4abc821b9d7893e768647daa
Signed-off-by: Ken Adams <kadams@nvidia.com>
Reviewed-on: http://git-master/r/399382
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/hw_ctxsw_prog_gk20a.h | 96 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/hw_fifo_gk20a.h | 40 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h | 22 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/hw_mc_gk20a.h | 32 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/hw_pbdma_gk20a.h | 64 |
5 files changed, 131 insertions, 123 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/hw_ctxsw_prog_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_ctxsw_prog_gk20a.h index e2a4f2f2..747566f0 100644 --- a/drivers/gpu/nvgpu/gk20a/hw_ctxsw_prog_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/hw_ctxsw_prog_gk20a.h | |||
@@ -94,10 +94,6 @@ static inline u32 ctxsw_prog_main_image_pm_mode_m(void) | |||
94 | { | 94 | { |
95 | return 0x7 << 0; | 95 | return 0x7 << 0; |
96 | } | 96 | } |
97 | static inline u32 ctxsw_prog_main_image_pm_mode_v(u32 r) | ||
98 | { | ||
99 | return (r >> 0) & 0x7; | ||
100 | } | ||
101 | static inline u32 ctxsw_prog_main_image_pm_mode_no_ctxsw_f(void) | 97 | static inline u32 ctxsw_prog_main_image_pm_mode_no_ctxsw_f(void) |
102 | { | 98 | { |
103 | return 0x0; | 99 | return 0x0; |
@@ -106,18 +102,14 @@ static inline u32 ctxsw_prog_main_image_pm_smpc_mode_m(void) | |||
106 | { | 102 | { |
107 | return 0x7 << 3; | 103 | return 0x7 << 3; |
108 | } | 104 | } |
109 | static inline u32 ctxsw_prog_main_image_pm_smpc_mode_v(u32 r) | 105 | static inline u32 ctxsw_prog_main_image_pm_smpc_mode_ctxsw_f(void) |
110 | { | 106 | { |
111 | return (r >> 3) & 0x7; | 107 | return 0x8; |
112 | } | 108 | } |
113 | static inline u32 ctxsw_prog_main_image_pm_smpc_mode_no_ctxsw_f(void) | 109 | static inline u32 ctxsw_prog_main_image_pm_smpc_mode_no_ctxsw_f(void) |
114 | { | 110 | { |
115 | return 0x0; | 111 | return 0x0; |
116 | } | 112 | } |
117 | static inline u32 ctxsw_prog_main_image_pm_smpc_mode_ctxsw_f(void) | ||
118 | { | ||
119 | return 0x8; | ||
120 | } | ||
121 | static inline u32 ctxsw_prog_main_image_pm_ptr_o(void) | 113 | static inline u32 ctxsw_prog_main_image_pm_ptr_o(void) |
122 | { | 114 | { |
123 | return 0x0000002c; | 115 | return 0x0000002c; |
@@ -138,46 +130,6 @@ static inline u32 ctxsw_prog_main_image_magic_value_v_value_v(void) | |||
138 | { | 130 | { |
139 | return 0x600dc0de; | 131 | return 0x600dc0de; |
140 | } | 132 | } |
141 | static inline u32 ctxsw_prog_main_image_priv_access_map_config_o(void) | ||
142 | { | ||
143 | return 0x000000a0; | ||
144 | } | ||
145 | static inline u32 ctxsw_prog_main_image_priv_access_map_config_mode_allow_all_f(void) | ||
146 | { | ||
147 | return 0x0; | ||
148 | } | ||
149 | static inline u32 ctxsw_prog_main_image_priv_access_map_config_mode_allow_none_f(void) | ||
150 | { | ||
151 | return 0x1; | ||
152 | } | ||
153 | static inline u32 ctxsw_prog_main_image_priv_access_map_config_mode_use_map_f(void) | ||
154 | { | ||
155 | return 0x2; | ||
156 | } | ||
157 | static inline u32 ctxsw_prog_main_image_priv_access_map_addr_lo_o(void) | ||
158 | { | ||
159 | return 0x000000a4; | ||
160 | } | ||
161 | static inline u32 ctxsw_prog_main_image_priv_access_map_addr_hi_o(void) | ||
162 | { | ||
163 | return 0x000000a8; | ||
164 | } | ||
165 | static inline u32 ctxsw_prog_main_image_misc_options_o(void) | ||
166 | { | ||
167 | return 0x0000003c; | ||
168 | } | ||
169 | static inline u32 ctxsw_prog_main_image_misc_options_verif_features_m(void) | ||
170 | { | ||
171 | return 0x1 << 3; | ||
172 | } | ||
173 | static inline u32 ctxsw_prog_main_image_misc_options_verif_features_disabled_f(void) | ||
174 | { | ||
175 | return 0x0; | ||
176 | } | ||
177 | static inline u32 ctxsw_prog_main_image_misc_options_verif_features_enabled_f(void) | ||
178 | { | ||
179 | return 0x8; | ||
180 | } | ||
181 | static inline u32 ctxsw_prog_local_priv_register_ctl_o(void) | 133 | static inline u32 ctxsw_prog_local_priv_register_ctl_o(void) |
182 | { | 134 | { |
183 | return 0x0000000c; | 135 | return 0x0000000c; |
@@ -242,4 +194,48 @@ static inline u32 ctxsw_prog_extended_num_smpc_quadrants_v(void) | |||
242 | { | 194 | { |
243 | return 0x00000004; | 195 | return 0x00000004; |
244 | } | 196 | } |
197 | static inline u32 ctxsw_prog_main_image_priv_access_map_config_o(void) | ||
198 | { | ||
199 | return 0x000000a0; | ||
200 | } | ||
201 | static inline u32 ctxsw_prog_main_image_priv_access_map_config_mode_s(void) | ||
202 | { | ||
203 | return 2; | ||
204 | } | ||
205 | static inline u32 ctxsw_prog_main_image_priv_access_map_config_mode_f(u32 v) | ||
206 | { | ||
207 | return (v & 0x3) << 0; | ||
208 | } | ||
209 | static inline u32 ctxsw_prog_main_image_priv_access_map_config_mode_m(void) | ||
210 | { | ||
211 | return 0x3 << 0; | ||
212 | } | ||
213 | static inline u32 ctxsw_prog_main_image_priv_access_map_config_mode_v(u32 r) | ||
214 | { | ||
215 | return (r >> 0) & 0x3; | ||
216 | } | ||
217 | static inline u32 ctxsw_prog_main_image_priv_access_map_config_mode_use_map_f(void) | ||
218 | { | ||
219 | return 0x2; | ||
220 | } | ||
221 | static inline u32 ctxsw_prog_main_image_priv_access_map_addr_lo_o(void) | ||
222 | { | ||
223 | return 0x000000a4; | ||
224 | } | ||
225 | static inline u32 ctxsw_prog_main_image_priv_access_map_addr_hi_o(void) | ||
226 | { | ||
227 | return 0x000000a8; | ||
228 | } | ||
229 | static inline u32 ctxsw_prog_main_image_misc_options_o(void) | ||
230 | { | ||
231 | return 0x0000003c; | ||
232 | } | ||
233 | static inline u32 ctxsw_prog_main_image_misc_options_verif_features_m(void) | ||
234 | { | ||
235 | return 0x1 << 3; | ||
236 | } | ||
237 | static inline u32 ctxsw_prog_main_image_misc_options_verif_features_disabled_f(void) | ||
238 | { | ||
239 | return 0x0; | ||
240 | } | ||
245 | #endif | 241 | #endif |
diff --git a/drivers/gpu/nvgpu/gk20a/hw_fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_fifo_gk20a.h index 5ebb8365..83e7d776 100644 --- a/drivers/gpu/nvgpu/gk20a/hw_fifo_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/hw_fifo_gk20a.h | |||
@@ -130,6 +130,22 @@ static inline u32 fifo_eng_timeslice_enable_true_f(void) | |||
130 | { | 130 | { |
131 | return 0x10000000; | 131 | return 0x10000000; |
132 | } | 132 | } |
133 | static inline u32 fifo_eng_timeout_r(void) | ||
134 | { | ||
135 | return 0x00002a0c; | ||
136 | } | ||
137 | static inline u32 fifo_eng_timeout_period_max_f(void) | ||
138 | { | ||
139 | return 0x7fffffff; | ||
140 | } | ||
141 | static inline u32 fifo_eng_timeout_detection_enabled_f(void) | ||
142 | { | ||
143 | return 0x80000000; | ||
144 | } | ||
145 | static inline u32 fifo_eng_timeout_detection_disabled_f(void) | ||
146 | { | ||
147 | return 0x0; | ||
148 | } | ||
133 | static inline u32 fifo_pb_timeslice_r(u32 i) | 149 | static inline u32 fifo_pb_timeslice_r(u32 i) |
134 | { | 150 | { |
135 | return 0x00002350 + i*4; | 151 | return 0x00002350 + i*4; |
@@ -350,30 +366,6 @@ static inline u32 fifo_pb_timeout_detection_enabled_f(void) | |||
350 | { | 366 | { |
351 | return 0x80000000; | 367 | return 0x80000000; |
352 | } | 368 | } |
353 | static inline u32 fifo_eng_timeout_r(void) | ||
354 | { | ||
355 | return 0x00002a0c; | ||
356 | } | ||
357 | static inline u32 fifo_eng_timeout_period_m(void) | ||
358 | { | ||
359 | return 0x7fffffff << 0; | ||
360 | } | ||
361 | static inline u32 fifo_eng_timeout_period_max_f(void) | ||
362 | { | ||
363 | return 0x7fffffff; | ||
364 | } | ||
365 | static inline u32 fifo_eng_timeout_detection_m(void) | ||
366 | { | ||
367 | return 0x1 << 31; | ||
368 | } | ||
369 | static inline u32 fifo_eng_timeout_detection_enabled_f(void) | ||
370 | { | ||
371 | return 0x80000000; | ||
372 | } | ||
373 | static inline u32 fifo_eng_timeout_detection_disabled_f(void) | ||
374 | { | ||
375 | return 0x0; | ||
376 | } | ||
377 | static inline u32 fifo_error_sched_disable_r(void) | 369 | static inline u32 fifo_error_sched_disable_r(void) |
378 | { | 370 | { |
379 | return 0x0000262c; | 371 | return 0x0000262c; |
diff --git a/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h index fad8d3a6..6fba0b46 100644 --- a/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h | |||
@@ -98,6 +98,18 @@ static inline u32 gr_intr_illegal_notify_reset_f(void) | |||
98 | { | 98 | { |
99 | return 0x40; | 99 | return 0x40; |
100 | } | 100 | } |
101 | static inline u32 gr_intr_firmware_method_f(u32 v) | ||
102 | { | ||
103 | return (v & 0x1) << 8; | ||
104 | } | ||
105 | static inline u32 gr_intr_firmware_method_pending_f(void) | ||
106 | { | ||
107 | return 0x100; | ||
108 | } | ||
109 | static inline u32 gr_intr_firmware_method_reset_f(void) | ||
110 | { | ||
111 | return 0x100; | ||
112 | } | ||
101 | static inline u32 gr_intr_illegal_class_pending_f(void) | 113 | static inline u32 gr_intr_illegal_class_pending_f(void) |
102 | { | 114 | { |
103 | return 0x20; | 115 | return 0x20; |
@@ -130,14 +142,6 @@ static inline u32 gr_intr_exception_reset_f(void) | |||
130 | { | 142 | { |
131 | return 0x200000; | 143 | return 0x200000; |
132 | } | 144 | } |
133 | static inline u32 gr_intr_firmware_method_pending_f(void) | ||
134 | { | ||
135 | return 0x100; | ||
136 | } | ||
137 | static inline u32 gr_intr_firmware_method_reset_f(void) | ||
138 | { | ||
139 | return 0x100; | ||
140 | } | ||
141 | static inline u32 gr_fecs_intr_r(void) | 145 | static inline u32 gr_fecs_intr_r(void) |
142 | { | 146 | { |
143 | return 0x00400144; | 147 | return 0x00400144; |
@@ -258,7 +262,7 @@ static inline u32 gr_status_fe_method_lower_idle_v(void) | |||
258 | { | 262 | { |
259 | return 0x00000000; | 263 | return 0x00000000; |
260 | } | 264 | } |
261 | static inline u32 gr_status_fe_method_fe_gi_v(u32 r) | 265 | static inline u32 gr_status_fe_gi_v(u32 r) |
262 | { | 266 | { |
263 | return (r >> 21) & 0x1; | 267 | return (r >> 21) & 0x1; |
264 | } | 268 | } |
diff --git a/drivers/gpu/nvgpu/gk20a/hw_mc_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_mc_gk20a.h index 1692bb54..479db499 100644 --- a/drivers/gpu/nvgpu/gk20a/hw_mc_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/hw_mc_gk20a.h | |||
@@ -110,14 +110,6 @@ static inline u32 mc_intr_mask_0_pmu_enabled_f(void) | |||
110 | { | 110 | { |
111 | return 0x1000000; | 111 | return 0x1000000; |
112 | } | 112 | } |
113 | static inline u32 mc_intr_mask_1_r(void) | ||
114 | { | ||
115 | return 0x00000644; | ||
116 | } | ||
117 | static inline u32 mc_intr_mask_1_pmu_enabled_f(void) | ||
118 | { | ||
119 | return 0x1000000; | ||
120 | } | ||
121 | static inline u32 mc_intr_en_0_r(void) | 113 | static inline u32 mc_intr_en_0_r(void) |
122 | { | 114 | { |
123 | return 0x00000140; | 115 | return 0x00000140; |
@@ -130,6 +122,30 @@ static inline u32 mc_intr_en_0_inta_hardware_f(void) | |||
130 | { | 122 | { |
131 | return 0x1; | 123 | return 0x1; |
132 | } | 124 | } |
125 | static inline u32 mc_intr_mask_1_r(void) | ||
126 | { | ||
127 | return 0x00000644; | ||
128 | } | ||
129 | static inline u32 mc_intr_mask_1_pmu_s(void) | ||
130 | { | ||
131 | return 1; | ||
132 | } | ||
133 | static inline u32 mc_intr_mask_1_pmu_f(u32 v) | ||
134 | { | ||
135 | return (v & 0x1) << 24; | ||
136 | } | ||
137 | static inline u32 mc_intr_mask_1_pmu_m(void) | ||
138 | { | ||
139 | return 0x1 << 24; | ||
140 | } | ||
141 | static inline u32 mc_intr_mask_1_pmu_v(u32 r) | ||
142 | { | ||
143 | return (r >> 24) & 0x1; | ||
144 | } | ||
145 | static inline u32 mc_intr_mask_1_pmu_enabled_f(void) | ||
146 | { | ||
147 | return 0x1000000; | ||
148 | } | ||
133 | static inline u32 mc_intr_en_1_r(void) | 149 | static inline u32 mc_intr_en_1_r(void) |
134 | { | 150 | { |
135 | return 0x00000144; | 151 | return 0x00000144; |
diff --git a/drivers/gpu/nvgpu/gk20a/hw_pbdma_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_pbdma_gk20a.h index df1a6d48..60e83122 100644 --- a/drivers/gpu/nvgpu/gk20a/hw_pbdma_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/hw_pbdma_gk20a.h | |||
@@ -146,38 +146,6 @@ static inline u32 pbdma_formats_mp_fermi0_f(void) | |||
146 | { | 146 | { |
147 | return 0x0; | 147 | return 0x0; |
148 | } | 148 | } |
149 | static inline u32 pbdma_syncpointa_r(u32 i) | ||
150 | { | ||
151 | return 0x000400a4 + i*8192; | ||
152 | } | ||
153 | static inline u32 pbdma_syncpointa_payload_v(u32 r) | ||
154 | { | ||
155 | return (r >> 0) & 0xffffffff; | ||
156 | } | ||
157 | static inline u32 pbdma_syncpointb_r(u32 i) | ||
158 | { | ||
159 | return 0x000400a8 + i*8192; | ||
160 | } | ||
161 | static inline u32 pbdma_syncpointb_op_v(u32 r) | ||
162 | { | ||
163 | return (r >> 0) & 0x3; | ||
164 | } | ||
165 | static inline u32 pbdma_syncpointb_op_wait_v(void) | ||
166 | { | ||
167 | return 0x00000000; | ||
168 | } | ||
169 | static inline u32 pbdma_syncpointb_wait_switch_v(u32 r) | ||
170 | { | ||
171 | return (r >> 4) & 0x1; | ||
172 | } | ||
173 | static inline u32 pbdma_syncpointb_wait_switch_en_v(void) | ||
174 | { | ||
175 | return 0x00000001; | ||
176 | } | ||
177 | static inline u32 pbdma_syncpointb_syncpt_index_v(u32 r) | ||
178 | { | ||
179 | return (r >> 8) & 0xff; | ||
180 | } | ||
181 | static inline u32 pbdma_pb_header_r(u32 i) | 149 | static inline u32 pbdma_pb_header_r(u32 i) |
182 | { | 150 | { |
183 | return 0x00040084 + i*8192; | 151 | return 0x00040084 + i*8192; |
@@ -466,4 +434,36 @@ static inline u32 pbdma_udma_nop_r(void) | |||
466 | { | 434 | { |
467 | return 0x00000008; | 435 | return 0x00000008; |
468 | } | 436 | } |
437 | static inline u32 pbdma_syncpointa_r(u32 i) | ||
438 | { | ||
439 | return 0x000400a4 + i*8192; | ||
440 | } | ||
441 | static inline u32 pbdma_syncpointa_payload_v(u32 r) | ||
442 | { | ||
443 | return (r >> 0) & 0xffffffff; | ||
444 | } | ||
445 | static inline u32 pbdma_syncpointb_r(u32 i) | ||
446 | { | ||
447 | return 0x000400a8 + i*8192; | ||
448 | } | ||
449 | static inline u32 pbdma_syncpointb_op_v(u32 r) | ||
450 | { | ||
451 | return (r >> 0) & 0x3; | ||
452 | } | ||
453 | static inline u32 pbdma_syncpointb_op_wait_v(void) | ||
454 | { | ||
455 | return 0x00000000; | ||
456 | } | ||
457 | static inline u32 pbdma_syncpointb_wait_switch_v(u32 r) | ||
458 | { | ||
459 | return (r >> 4) & 0x1; | ||
460 | } | ||
461 | static inline u32 pbdma_syncpointb_wait_switch_en_v(void) | ||
462 | { | ||
463 | return 0x00000001; | ||
464 | } | ||
465 | static inline u32 pbdma_syncpointb_syncpt_index_v(u32 r) | ||
466 | { | ||
467 | return (r >> 8) & 0xff; | ||
468 | } | ||
469 | #endif | 469 | #endif |