diff options
author | Seema Khowala <seemaj@nvidia.com> | 2017-02-22 15:29:57 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-02-27 13:13:22 -0500 |
commit | 0a3e5941ffed3239661ea48381ebece2c7a707f2 (patch) | |
tree | de760ad3486c0f4ed2d75b7569f401aad6f2c667 /drivers/gpu/nvgpu/gk20a | |
parent | ac8cea9351a15c7f081621bc83e8a318b9531020 (diff) |
gpu: nvgpu: add pbdma and eng bitmask for runlists
-Init pbdma and engine bit mask per runlist.
-Organize debug info to print supported pbdma instances
for particular runlist.
JIRA GV11B-3
Change-Id: Ie34dd98ccbe2c779ca1c795855c2a7df4abd2715
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1309706
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 39 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.h | 3 |
2 files changed, 36 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index c245f4a2..0d3a75fc 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -326,6 +326,7 @@ int gk20a_fifo_init_engine_info(struct fifo_gk20a *f) | |||
326 | u32 pri_base = 0; | 326 | u32 pri_base = 0; |
327 | u32 fault_id = 0; | 327 | u32 fault_id = 0; |
328 | u32 gr_runlist_id = ~0; | 328 | u32 gr_runlist_id = ~0; |
329 | bool found_pbdma_for_runlist = false; | ||
329 | 330 | ||
330 | gk20a_dbg_fn(""); | 331 | gk20a_dbg_fn(""); |
331 | 332 | ||
@@ -352,14 +353,20 @@ int gk20a_fifo_init_engine_info(struct fifo_gk20a *f) | |||
352 | 353 | ||
353 | runlist_bit = BIT(runlist_id); | 354 | runlist_bit = BIT(runlist_id); |
354 | 355 | ||
355 | for (pbdma_id = 0; pbdma_id < f->num_pbdma; pbdma_id++) { | 356 | found_pbdma_for_runlist = false; |
356 | gk20a_dbg_info("gr info: pbdma_map[%d]=%d", | 357 | for (pbdma_id = 0; pbdma_id < f->num_pbdma; |
357 | pbdma_id, f->pbdma_map[pbdma_id]); | 358 | pbdma_id++) { |
358 | if (f->pbdma_map[pbdma_id] & runlist_bit) | 359 | if (f->pbdma_map[pbdma_id] & |
359 | break; | 360 | runlist_bit) { |
361 | gk20a_dbg_info( | ||
362 | "gr info: pbdma_map[%d]=%d", | ||
363 | pbdma_id, | ||
364 | f->pbdma_map[pbdma_id]); | ||
365 | found_pbdma_for_runlist = true; | ||
366 | } | ||
360 | } | 367 | } |
361 | 368 | ||
362 | if (pbdma_id == f->num_pbdma) { | 369 | if (!found_pbdma_for_runlist) { |
363 | gk20a_err(d, "busted pbdma map"); | 370 | gk20a_err(d, "busted pbdma map"); |
364 | return -EINVAL; | 371 | return -EINVAL; |
365 | } | 372 | } |
@@ -611,6 +618,8 @@ static int init_runlist(struct gk20a *g, struct fifo_gk20a *f) | |||
611 | unsigned int runlist_id; | 618 | unsigned int runlist_id; |
612 | u32 i; | 619 | u32 i; |
613 | size_t runlist_size; | 620 | size_t runlist_size; |
621 | u32 active_engine_id, pbdma_id, engine_id; | ||
622 | struct fifo_engine_info_gk20a *engine_info; | ||
614 | 623 | ||
615 | gk20a_dbg_fn(""); | 624 | gk20a_dbg_fn(""); |
616 | 625 | ||
@@ -655,8 +664,26 @@ static int init_runlist(struct gk20a *g, struct fifo_gk20a *f) | |||
655 | /* None of buffers is pinned if this value doesn't change. | 664 | /* None of buffers is pinned if this value doesn't change. |
656 | Otherwise, one of them (cur_buffer) must have been pinned. */ | 665 | Otherwise, one of them (cur_buffer) must have been pinned. */ |
657 | runlist->cur_buffer = MAX_RUNLIST_BUFFERS; | 666 | runlist->cur_buffer = MAX_RUNLIST_BUFFERS; |
667 | |||
668 | for (pbdma_id = 0; pbdma_id < f->num_pbdma; pbdma_id++) { | ||
669 | if (f->pbdma_map[pbdma_id] & BIT(runlist_id)) | ||
670 | runlist->pbdma_bitmask |= BIT(pbdma_id); | ||
671 | } | ||
672 | gk20a_dbg_info("runlist %d : pbdma bitmask %x", | ||
673 | runlist_id, runlist->pbdma_bitmask); | ||
674 | |||
675 | for (engine_id = 0; engine_id < f->num_engines; ++engine_id) { | ||
676 | active_engine_id = f->active_engines_list[engine_id]; | ||
677 | engine_info = &f->engine_info[active_engine_id]; | ||
678 | |||
679 | if (engine_info && engine_info->runlist_id == runlist_id) | ||
680 | runlist->eng_bitmask |= BIT(engine_id); | ||
681 | } | ||
682 | gk20a_dbg_info("runlist %d : eng bitmask %x", | ||
683 | runlist_id, runlist->eng_bitmask); | ||
658 | } | 684 | } |
659 | 685 | ||
686 | |||
660 | gk20a_dbg_fn("done"); | 687 | gk20a_dbg_fn("done"); |
661 | return 0; | 688 | return 0; |
662 | 689 | ||
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h index 1a248dba..350bfa88 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h | |||
@@ -39,6 +39,9 @@ struct fifo_runlist_info_gk20a { | |||
39 | struct mem_desc mem[MAX_RUNLIST_BUFFERS]; | 39 | struct mem_desc mem[MAX_RUNLIST_BUFFERS]; |
40 | u32 cur_buffer; | 40 | u32 cur_buffer; |
41 | u32 total_entries; | 41 | u32 total_entries; |
42 | u32 pbdma_bitmask; /* pbdmas supported for this runlist*/ | ||
43 | u32 eng_bitmask; /* engines using this runlist */ | ||
44 | u32 reset_eng_bitmask; /* engines to be reset during recovery */ | ||
42 | bool stopped; | 45 | bool stopped; |
43 | bool support_tsg; | 46 | bool support_tsg; |
44 | struct nvgpu_mutex mutex; /* protect channel preempt and runlist update */ | 47 | struct nvgpu_mutex mutex; /* protect channel preempt and runlist update */ |