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authorThomas Fleury <tfleury@nvidia.com>2018-01-23 17:20:43 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2018-02-26 00:48:24 -0500
commit0601fd25a5e01d0da638efef13c58b64f198bafb (patch)
treedbe843912a525497103bbe9beefc6e78ff67c8c9 /drivers/gpu/nvgpu/gk20a
parent223ea4d8a179835dd5899bbc12fe78b4998b0bd7 (diff)
gpu: nvgpu: gv100: nvlink endpoint driver
The following changes implements the initial (as per bringup) nvlink driver. (1) SW initialization of nvlink core driver structures (2) Nvlink interrupt handling (3) Device initialization (IOCTRL, pll and clocks, device level intr) (4) Falcon support for minion (5) Minion load and bootstrapping (6) Link initialization and DL PROD settings (7) Device Interface init (and switching HSHUB to nvlink) (8) HS set/get mode for both link and sublink (9) Topology discovery and VBIOS settings. (10) Ensures we get physical contiguous memory when Nvlink is enabled This driver includes a hack for the current single dev/single link limitation. JIRA: EVLR-2331 JIRA: EVLR-2330 JIRA: EVLR-2329 JIRA: EVLR-2328 Change-Id: Idca9a819179376cc655784482b24b575a52fa9e5 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1656790 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h10
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 02c7d0d9..40656edd 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -967,6 +967,8 @@ struct gpu_ops {
967 void (*isr_stall)(struct gk20a *g); 967 void (*isr_stall)(struct gk20a *g);
968 bool (*is_intr_hub_pending)(struct gk20a *g, u32 mc_intr); 968 bool (*is_intr_hub_pending)(struct gk20a *g, u32 mc_intr);
969 bool (*is_intr_nvlink_pending)(struct gk20a *g, u32 mc_intr); 969 bool (*is_intr_nvlink_pending)(struct gk20a *g, u32 mc_intr);
970 bool (*is_stall_and_eng_intr_pending)(struct gk20a *g,
971 u32 act_eng_id);
970 u32 (*intr_stall)(struct gk20a *g); 972 u32 (*intr_stall)(struct gk20a *g);
971 void (*intr_stall_pause)(struct gk20a *g); 973 void (*intr_stall_pause)(struct gk20a *g);
972 void (*intr_stall_resume)(struct gk20a *g); 974 void (*intr_stall_resume)(struct gk20a *g);
@@ -1064,10 +1066,10 @@ struct gpu_ops {
1064 int (*check_priv_security)(struct gk20a *g); 1066 int (*check_priv_security)(struct gk20a *g);
1065 } fuse; 1067 } fuse;
1066 struct { 1068 struct {
1067 u32 (*init)(struct gk20a *g); 1069 int (*init)(struct gk20a *g);
1068 u32 (*discover_ioctrl)(struct gk20a *g); 1070 int (*discover_ioctrl)(struct gk20a *g);
1069 u32 (*discover_link)(struct gk20a *g); 1071 int (*discover_link)(struct gk20a *g);
1070 u32 (*isr)(struct gk20a *g); 1072 int (*isr)(struct gk20a *g);
1071 /* API */ 1073 /* API */
1072 int (*link_early_init)(struct gk20a *g, unsigned long mask); 1074 int (*link_early_init)(struct gk20a *g, unsigned long mask);
1073 u32 (*link_get_mode)(struct gk20a *g, u32 link_id); 1075 u32 (*link_get_mode)(struct gk20a *g, u32 link_id);