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authorVaikundanathan S <vaikuns@nvidia.com>2018-04-23 07:51:58 -0400
committerTejal Kudav <tkudav@nvidia.com>2018-06-14 09:44:06 -0400
commit054546525571dde1117376176f00511f13168f07 (patch)
tree477c3ef6d9502ce584f2588e0240a8fbd93be2a5 /drivers/gpu/nvgpu/gk20a
parent14d8430697d6867325fc1f40eef820cca40c3d2f (diff)
gpu: nvgpu: set gv10x boot clock
- Set gv10x boot gpcclk to 952 MHz - Created ops to set gv10x boot gpcclk instead of using clk arbiter to set clocks Bug 200399373 Change-Id: Ice5956f79d4a52abf455506a798cf7b914f3d3ed Signed-off-by: Vaikundanathan S <vaikuns@nvidia.com> Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1700788 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.c12
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h1
2 files changed, 9 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c
index c48d7cf8..9ce2ef53 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.c
@@ -281,10 +281,14 @@ int gk20a_finalize_poweron(struct gk20a *g)
281 } 281 }
282 } 282 }
283 283
284 err = nvgpu_clk_arb_init_arbiter(g); 284 if (g->ops.pmu_ver.clk.clk_set_boot_clk && nvgpu_is_enabled(g, NVGPU_PMU_PSTATE))
285 if (err) { 285 g->ops.pmu_ver.clk.clk_set_boot_clk(g);
286 nvgpu_err(g, "failed to init clk arb"); 286 else {
287 goto done; 287 err = nvgpu_clk_arb_init_arbiter(g);
288 if (err) {
289 nvgpu_err(g, "failed to init clk arb");
290 goto done;
291 }
288 } 292 }
289 293
290 err = gk20a_init_therm_support(g); 294 err = gk20a_init_therm_support(g);
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 8f35e2c9..07ff28f6 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -820,6 +820,7 @@ struct gpu_ops {
820 struct nv_pmu_clk_rpc *rpccall, 820 struct nv_pmu_clk_rpc *rpccall,
821 struct set_fll_clk *setfllclk); 821 struct set_fll_clk *setfllclk);
822 u32 (*perf_pmu_vfe_load)(struct gk20a *g); 822 u32 (*perf_pmu_vfe_load)(struct gk20a *g);
823 u32 (*clk_set_boot_clk)(struct gk20a *g);
823 }clk; 824 }clk;
824 } pmu_ver; 825 } pmu_ver;
825 struct { 826 struct {