diff options
author | Konsta Holtta <kholtta@nvidia.com> | 2018-09-21 08:28:15 -0400 |
---|---|---|
committer | Konsta Holtta <kholtta@nvidia.com> | 2018-09-21 10:55:39 -0400 |
commit | ce5228e09411f9c54e96cfb0f7e9c857fd9b480d (patch) | |
tree | 26bbc69aa41fc1cb78746540cbf395f6a9cdda12 /drivers/gpu/nvgpu/gk20a/tsg_gk20a.h | |
parent | 84097d54f3b9ff242c4c3fb3c0a95353e8513b33 (diff) |
Revert "gpu: nvgpu: refactor SET_SM_EXCEPTION_MASK ioctl"
This reverts commit c5810a670d367ae1dc405fcc3108e11265df34bb.
Bug 2400508
Jira VQRM-4806
Bug 200447406
Bug 2331747
Change-Id: Ie2a2c21f9285ff0349c7033fae24766a7117b462
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1837223
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/tsg_gk20a.h')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/tsg_gk20a.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h index d13cd388..1e3be553 100644 --- a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h | |||
@@ -82,7 +82,6 @@ struct tsg_gk20a { | |||
82 | #define NVGPU_SM_EXCEPTION_TYPE_MASK_NONE (0x0U) | 82 | #define NVGPU_SM_EXCEPTION_TYPE_MASK_NONE (0x0U) |
83 | #define NVGPU_SM_EXCEPTION_TYPE_MASK_FATAL (0x1U << 0) | 83 | #define NVGPU_SM_EXCEPTION_TYPE_MASK_FATAL (0x1U << 0) |
84 | u32 sm_exception_mask_type; | 84 | u32 sm_exception_mask_type; |
85 | struct nvgpu_mutex sm_exception_mask_lock; | ||
86 | }; | 85 | }; |
87 | 86 | ||
88 | int gk20a_enable_tsg(struct tsg_gk20a *tsg); | 87 | int gk20a_enable_tsg(struct tsg_gk20a *tsg); |
@@ -104,8 +103,6 @@ int gk20a_tsg_alloc_sm_error_states_mem(struct gk20a *g, | |||
104 | void gk20a_tsg_update_sm_error_state_locked(struct tsg_gk20a *tsg, | 103 | void gk20a_tsg_update_sm_error_state_locked(struct tsg_gk20a *tsg, |
105 | u32 sm_id, | 104 | u32 sm_id, |
106 | struct nvgpu_tsg_sm_error_state *sm_error_state); | 105 | struct nvgpu_tsg_sm_error_state *sm_error_state); |
107 | int gk20a_tsg_set_sm_exception_type_mask(struct channel_gk20a *ch, | ||
108 | u32 exception_mask); | ||
109 | 106 | ||
110 | struct gk20a_event_id_data { | 107 | struct gk20a_event_id_data { |
111 | struct gk20a *g; | 108 | struct gk20a *g; |