gpu: nvgpu: reset TSG timeslice params on open

The TSG timeslice params were not being reset on open,
resulting in timeslices being incorrectly inherited across
close->open cycles.

Bug 1617046

Change-Id: I5124634fbf058f9f1b57c5c9cc1428db8df4ad43
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/1146849
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Sami Kiminki <skiminki@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 2 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
index 5f4cf931..5b77bf80 100644
--- a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
@@ -406,6 +406,8 @@ int gk20a_tsg_open(struct gk20a *g, struct file *filp)
         tsg->vm = NULL;
         tsg->interleave_level = NVGPU_RUNLIST_INTERLEAVE_LEVEL_LOW;
         tsg->timeslice_us = 0;
+        tsg->timeslice_timeout = 0;
+        tsg->timeslice_scale = 0;
 
         filp->private_data = tsg;