gpu: nvgpu: APIs to enable/disable TSG

export below APIs for TSGs :

gk20a_enable_tsg() - enable only TSG
gk20a_disable_tsg() - disable only TSG

gk20a_enable_channel_tsg() -
if channel is part of TSG, enable TSG
otherwise enable channel

gk20a_disable_channel_tsg() -
if channel is part of TSG, disable TSG
otherwise disable channel

Bug 200156699

Change-Id: Icdaca35235c3f323687f839fe32c6c5fe964b230
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/927131
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 33 insertions, 17 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
index 5cd43329..4421744c 100644
--- a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2014-2015, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2014-2016, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -32,6 +32,36 @@ bool gk20a_is_channel_marked_as_tsg(struct channel_gk20a *ch)
         return !(ch->tsgid == NVGPU_INVALID_TSG_ID);
 }
 
+int gk20a_enable_tsg(struct tsg_gk20a *tsg)
+{
+        struct channel_gk20a *ch;
+
+        mutex_lock(&tsg->ch_list_lock);
+        list_for_each_entry(ch, &tsg->ch_list, ch_entry) {
+                gk20a_writel(ch->g, ccsr_channel_r(ch->hw_chid),
+                        gk20a_readl(ch->g, ccsr_channel_r(ch->hw_chid))
+                        | ccsr_channel_enable_set_true_f());
+        }
+        mutex_unlock(&tsg->ch_list_lock);
+
+        return 0;
+}
+
+int gk20a_disable_tsg(struct tsg_gk20a *tsg)
+{
+        struct channel_gk20a *ch;
+
+        mutex_lock(&tsg->ch_list_lock);
+        list_for_each_entry(ch, &tsg->ch_list, ch_entry) {
+                gk20a_writel(ch->g, ccsr_channel_r(ch->hw_chid),
+                        gk20a_readl(ch->g, ccsr_channel_r(ch->hw_chid))
+                        | ccsr_channel_enable_clr_true_f());
+        }
+        mutex_unlock(&tsg->ch_list_lock);
+
+        return 0;
+}
+
 static bool gk20a_is_channel_active(struct gk20a *g, struct channel_gk20a *ch)
 {
         struct fifo_gk20a *f = &g->fifo;
@@ -296,40 +326,26 @@ long gk20a_tsg_dev_ioctl(struct file *filp, unsigned int cmd,
 
         case NVGPU_IOCTL_TSG_ENABLE:
                 {
-                struct channel_gk20a *ch;
                 err = gk20a_busy(g->dev);
                 if (err) {
                         gk20a_err(&g->dev->dev,
                            "failed to host gk20a for ioctl cmd: 0x%x", cmd);
                         return err;
                 }
-                mutex_lock(&tsg->ch_list_lock);
-                list_for_each_entry(ch, &tsg->ch_list, ch_entry) {
-                        gk20a_writel(ch->g, ccsr_channel_r(ch->hw_chid),
-                                gk20a_readl(ch->g, ccsr_channel_r(ch->hw_chid))
-                                | ccsr_channel_enable_set_true_f());
-                }
-                mutex_unlock(&tsg->ch_list_lock);
+                gk20a_enable_tsg(tsg);
                 gk20a_idle(g->dev);
                 break;
                 }
 
         case NVGPU_IOCTL_TSG_DISABLE:
                 {
-                struct channel_gk20a *ch;
                 err = gk20a_busy(g->dev);
                 if (err) {
                         gk20a_err(&g->dev->dev,
                            "failed to host gk20a for ioctl cmd: 0x%x", cmd);
                         return err;
                 }
-                mutex_lock(&tsg->ch_list_lock);
-                list_for_each_entry(ch, &tsg->ch_list, ch_entry) {
-                        gk20a_writel(ch->g, ccsr_channel_r(ch->hw_chid),
-                                gk20a_readl(ch->g, ccsr_channel_r(ch->hw_chid))
-                                | ccsr_channel_enable_clr_true_f());
-                }
-                mutex_unlock(&tsg->ch_list_lock);
+                gk20a_disable_tsg(tsg);
                 gk20a_idle(g->dev);
                 break;
                 }