gpu: nvgpu: fix TSG enable sequence

Due to a h/w bug in Maxwell and Pascal we first need to enable all channels with
NEXT and CTX_RELOAD set in a TSG, and then rest of the channels should be
enabled
Add this sequence to gk20a_tsg_enable()

Add new APIs to enable/disable scheduling of TSG runlist
gk20a_fifo_enable_tsg_sched()
gk20a_fifo_disble_tsg_sched()

Add new APIs to check if channel has NEXT or CTX_RELOAD set
gk20a_fifo_channel_status_is_next()
gk20a_fifo_channel_status_is_ctx_reload()

Bug 1739362

Change-Id: I4891cbd7f22ebc1e0bf32c52801002cdc259dbe1
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1560636
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 24 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
index f3e87a13..eabb98ea 100644
--- a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
@@ -29,13 +29,37 @@ int gk20a_enable_tsg(struct tsg_gk20a *tsg)
 {
         struct gk20a *g = tsg->g;
         struct channel_gk20a *ch;
+        bool is_next, is_ctx_reload;
 
+        gk20a_fifo_disable_tsg_sched(g, tsg);
+
+        /*
+         * Due to h/w bug that exists in Maxwell and Pascal,
+         * we first need to enable all channels with NEXT and CTX_RELOAD set,
+         * and then rest of the channels should be enabled
+         */
         down_read(&tsg->ch_list_lock);
         nvgpu_list_for_each_entry(ch, &tsg->ch_list, channel_gk20a, ch_entry) {
+                is_next = gk20a_fifo_channel_status_is_next(g, ch->chid);
+                is_ctx_reload = gk20a_fifo_channel_status_is_ctx_reload(g, ch->chid);
+
+                if (is_next || is_ctx_reload)
+                        g->ops.fifo.enable_channel(ch);
+        }
+
+        nvgpu_list_for_each_entry(ch, &tsg->ch_list, channel_gk20a, ch_entry) {
+                is_next = gk20a_fifo_channel_status_is_next(g, ch->chid);
+                is_ctx_reload = gk20a_fifo_channel_status_is_ctx_reload(g, ch->chid);
+
+                if (is_next || is_ctx_reload)
+                        continue;
+
                 g->ops.fifo.enable_channel(ch);
         }
         up_read(&tsg->ch_list_lock);
 
+        gk20a_fifo_enable_tsg_sched(g, tsg);
+
         return 0;
 }