gpu: nvgpu: Replace kref for refcounting in nvgpu

- added wrapper struct nvgpu_ref over nvgpu_atomic_t
- added nvgpu_ref_* APIs to access the above struct

JIRA NVGPU-140

Change-Id: Id47f897995dd4721751f7610b6d4d4fbfe4d6b9a
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1540899
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>

1 files changed, 10 insertions, 10 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/sched_gk20a.c b/drivers/gpu/nvgpu/gk20a/sched_gk20a.c
index 014848ba..ac54addd 100644
--- a/drivers/gpu/nvgpu/gk20a/sched_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/sched_gk20a.c
@@ -189,7 +189,7 @@ static int gk20a_sched_dev_ioctl_get_params(struct gk20a_sched_ctrl *sched,
                 return -EINVAL;
 
         tsg = &f->tsg[tsgid];
-        if (!kref_get_unless_zero(&tsg->refcount))
+        if (!nvgpu_ref_get_unless_zero(&tsg->refcount))
                 return -ENXIO;
 
         arg->pid = tsg->tgid;   /* kernel tgid corresponds to user pid */
@@ -206,7 +206,7 @@ static int gk20a_sched_dev_ioctl_get_params(struct gk20a_sched_ctrl *sched,
                 arg->compute_preempt_mode = 0;
         }
 
-        kref_put(&tsg->refcount, gk20a_tsg_release);
+        nvgpu_ref_put(&tsg->refcount, gk20a_tsg_release);
 
         return 0;
 }
@@ -227,7 +227,7 @@ static int gk20a_sched_dev_ioctl_tsg_set_timeslice(
                 return -EINVAL;
 
         tsg = &f->tsg[tsgid];
-        if (!kref_get_unless_zero(&tsg->refcount))
+        if (!nvgpu_ref_get_unless_zero(&tsg->refcount))
                 return -ENXIO;
 
         err = gk20a_busy(g);
@@ -239,7 +239,7 @@ static int gk20a_sched_dev_ioctl_tsg_set_timeslice(
         gk20a_idle(g);
 
 done:
-        kref_put(&tsg->refcount, gk20a_tsg_release);
+        nvgpu_ref_put(&tsg->refcount, gk20a_tsg_release);
 
         return err;
 }
@@ -260,7 +260,7 @@ static int gk20a_sched_dev_ioctl_tsg_set_runlist_interleave(
                 return -EINVAL;
 
         tsg = &f->tsg[tsgid];
-        if (!kref_get_unless_zero(&tsg->refcount))
+        if (!nvgpu_ref_get_unless_zero(&tsg->refcount))
                 return -ENXIO;
 
         err = gk20a_busy(g);
@@ -272,7 +272,7 @@ static int gk20a_sched_dev_ioctl_tsg_set_runlist_interleave(
         gk20a_idle(g);
 
 done:
-        kref_put(&tsg->refcount, gk20a_tsg_release);
+        nvgpu_ref_put(&tsg->refcount, gk20a_tsg_release);
 
         return err;
 }
@@ -320,7 +320,7 @@ static int gk20a_sched_dev_ioctl_get_tsg(struct gk20a_sched_ctrl *sched,
                 return -EINVAL;
 
         tsg = &f->tsg[tsgid];
-        if (!kref_get_unless_zero(&tsg->refcount))
+        if (!nvgpu_ref_get_unless_zero(&tsg->refcount))
                 return -ENXIO;
 
         nvgpu_mutex_acquire(&sched->status_lock);
@@ -328,7 +328,7 @@ static int gk20a_sched_dev_ioctl_get_tsg(struct gk20a_sched_ctrl *sched,
                 nvgpu_warn(g, "tsgid=%d already referenced", tsgid);
                 /* unlock status_lock as gk20a_tsg_release locks it */
                 nvgpu_mutex_release(&sched->status_lock);
-                kref_put(&tsg->refcount, gk20a_tsg_release);
+                nvgpu_ref_put(&tsg->refcount, gk20a_tsg_release);
                 return -ENXIO;
         }
 
@@ -364,7 +364,7 @@ static int gk20a_sched_dev_ioctl_put_tsg(struct gk20a_sched_ctrl *sched,
         nvgpu_mutex_release(&sched->status_lock);
 
         tsg = &f->tsg[tsgid];
-        kref_put(&tsg->refcount, gk20a_tsg_release);
+        nvgpu_ref_put(&tsg->refcount, gk20a_tsg_release);
 
         return 0;
 }
@@ -507,7 +507,7 @@ int gk20a_sched_dev_release(struct inode *inode, struct file *filp)
         for (tsgid = 0; tsgid < f->num_channels; tsgid++) {
                 if (NVGPU_SCHED_ISSET(tsgid, sched->ref_tsg_bitmap)) {
                         tsg = &f->tsg[tsgid];
-                        kref_put(&tsg->refcount, gk20a_tsg_release);
+                        nvgpu_ref_put(&tsg->refcount, gk20a_tsg_release);
                 }
         }