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authorAnup Mahindre <amahindre@nvidia.com>2018-09-05 08:06:46 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-09-09 20:23:06 -0400
commitb026c012963b135f8689c4409d12e79a76bb1156 (patch)
tree5bc8c5af18832f7d8264b22359aa68088381e0ce /drivers/gpu/nvgpu/gk20a/regops_gk20a.h
parente93a4ca50b6b24d3db1f8fdc0e5030fecb5ea8d2 (diff)
gpu: nvgpu: Return gr_ctx_resident from NVGPU_DBG_GPU_IOCTL_REG_OPS
NVGPU_DBG_GPU_IOCTL_REG_OPS currently doesn't return if the ctx was resident in engine or not. Regops are broken down into batches of 128 and each batch is executed together. Since there only 32 bits were available in IOCTL args, returning is ctx was resident isn't possible for all batches. Hence return if the ctx was resident for the first batch. Bug 200445575 Change-Id: Iff950be25893de0afadd523d4ea04842a8ddf2af Signed-off-by: Anup Mahindre <amahindre@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1812975 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/regops_gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/regops_gk20a.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/regops_gk20a.h b/drivers/gpu/nvgpu/gk20a/regops_gk20a.h
index 0fb108a4..96705879 100644
--- a/drivers/gpu/nvgpu/gk20a/regops_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/regops_gk20a.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * Tegra GK20A GPU Debugger Driver Register Ops 2 * Tegra GK20A GPU Debugger Driver Register Ops
3 * 3 *
4 * Copyright (c) 2013-2017, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2013-2018, NVIDIA CORPORATION. All rights reserved.
5 * 5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a 6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"), 7 * copy of this software and associated documentation files (the "Software"),
@@ -77,7 +77,8 @@ struct regop_offset_range {
77 77
78int exec_regops_gk20a(struct dbg_session_gk20a *dbg_s, 78int exec_regops_gk20a(struct dbg_session_gk20a *dbg_s,
79 struct nvgpu_dbg_reg_op *ops, 79 struct nvgpu_dbg_reg_op *ops,
80 u64 num_ops); 80 u64 num_ops,
81 bool *is_current_ctx);
81 82
82/* turn seriously unwieldy names -> something shorter */ 83/* turn seriously unwieldy names -> something shorter */
83#define REGOP(x) NVGPU_DBG_REG_OP_##x 84#define REGOP(x) NVGPU_DBG_REG_OP_##x