diff options
author | Arto Merilainen <amerilainen@nvidia.com> | 2014-03-19 03:38:25 -0400 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:08:53 -0400 |
commit | a9785995d5f22aaeb659285f8aeb64d8b56982e0 (patch) | |
tree | cc75f75bcf43db316a002a7a240b81f299bf6d7f /drivers/gpu/nvgpu/gk20a/regops_gk20a.h | |
parent | 61efaf843c22b85424036ec98015121c08f5f16c (diff) |
gpu: nvgpu: Add NVIDIA GPU Driver
This patch moves the NVIDIA GPU driver to a new location.
Bug 1482562
Change-Id: I24293810b9d0f1504fd9be00135e21dad656ccb6
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/383722
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/regops_gk20a.h')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/regops_gk20a.h | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/regops_gk20a.h b/drivers/gpu/nvgpu/gk20a/regops_gk20a.h new file mode 100644 index 00000000..23b4865b --- /dev/null +++ b/drivers/gpu/nvgpu/gk20a/regops_gk20a.h | |||
@@ -0,0 +1,47 @@ | |||
1 | /* | ||
2 | * | ||
3 | * Tegra GK20A GPU Debugger Driver Register Ops | ||
4 | * | ||
5 | * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms and conditions of the GNU General Public License, | ||
9 | * version 2, as published by the Free Software Foundation. | ||
10 | * | ||
11 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | * more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
18 | */ | ||
19 | #ifndef __REGOPS_GK20A_H_ | ||
20 | #define __REGOPS_GK20A_H_ | ||
21 | |||
22 | int exec_regops_gk20a(struct dbg_session_gk20a *dbg_s, | ||
23 | struct nvhost_dbg_gpu_reg_op *ops, | ||
24 | u64 num_ops); | ||
25 | |||
26 | /* turn seriously unwieldy names -> something shorter */ | ||
27 | #define REGOP(x) NVHOST_DBG_GPU_REG_OP_##x | ||
28 | |||
29 | |||
30 | static inline bool reg_op_is_gr_ctx(u8 type) | ||
31 | { | ||
32 | return type == REGOP(TYPE_GR_CTX) || | ||
33 | type == REGOP(TYPE_GR_CTX_TPC) || | ||
34 | type == REGOP(TYPE_GR_CTX_SM) || | ||
35 | type == REGOP(TYPE_GR_CTX_CROP) || | ||
36 | type == REGOP(TYPE_GR_CTX_ZROP) || | ||
37 | type == REGOP(TYPE_GR_CTX_QUAD); | ||
38 | } | ||
39 | static inline bool reg_op_is_read(u8 op) | ||
40 | { | ||
41 | return op == REGOP(READ_32) || | ||
42 | op == REGOP(READ_64) ; | ||
43 | } | ||
44 | |||
45 | bool is_bar0_global_offset_whitelisted_gk20a(u32 offset); | ||
46 | |||
47 | #endif /* __REGOPS_GK20A_H_ */ | ||