gpu: nvgpu: allow global regops before ctx is created

In nvgpu_ioctl_channel_reg_ops(), we right now first check if context is
allocated or not and if context is not allocated we fail the regops operation

But it is possible that the regops operation only includes global regops which
does not need global context allocated

So move this global context check from nvgpu_ioctl_channel_reg_ops() to
exec_regops_gk20a() and only if we have context ops included in the regops

Bug 200431958

Change-Id: Iaa4953235d95b2106d5f81a456141d3a57603fb9
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1789262
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 33 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/regops_gk20a.c b/drivers/gpu/nvgpu/gk20a/regops_gk20a.c
index a5595c15..232d01a7 100644
--- a/drivers/gpu/nvgpu/gk20a/regops_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/regops_gk20a.c
@@ -53,6 +53,31 @@ static inline bool linear_search(u32 offset, const u32 *list, int size)
         return false;
 }
 
+/*
+ * In order to perform a context relative op the context has
+ * to be created already... which would imply that the
+ * context switch mechanism has already been put in place.
+ * So by the time we perform such an opertation it should always
+ * be possible to query for the appropriate context offsets, etc.
+ *
+ * But note: while the dbg_gpu bind requires the a channel fd,
+ * it doesn't require an allocated gr/compute obj at that point...
+ */
+static bool gr_context_info_available(struct gr_gk20a *gr)
+{
+        int err;
+
+        nvgpu_mutex_acquire(&gr->ctx_mutex);
+        err = !gr->ctx_vars.golden_image_initialized;
+        nvgpu_mutex_release(&gr->ctx_mutex);
+        if (err) {
+                return false;
+        }
+
+        return true;
+
+}
+
 static bool validate_reg_ops(struct dbg_session_gk20a *dbg_s,
                              u32 *ctx_rd_count, u32 *ctx_wr_count,
                              struct nvgpu_dbg_reg_op *ops,
@@ -91,7 +116,6 @@ int exec_regops_gk20a(struct dbg_session_gk20a *dbg_s,
         ok = validate_reg_ops(dbg_s,
                               &ctx_rd_count, &ctx_wr_count,
                               ops, num_ops);
-
         if (!ok) {
                 nvgpu_err(g, "invalid op(s)");
                 err = -EINVAL;
@@ -99,6 +123,14 @@ int exec_regops_gk20a(struct dbg_session_gk20a *dbg_s,
                 goto clean_up;
         }
 
+        /* be sure that ctx info is in place if there are ctx ops */
+        if (ctx_wr_count | ctx_rd_count) {
+                if (!gr_context_info_available(&g->gr)) {
+                        nvgpu_err(g, "gr context data not available");
+                        return -ENODEV;
+                }
+        }
+
         for (i = 0; i < num_ops; i++) {
                 /* if it isn't global then it is done in the ctx ops... */
                 if (ops[i].type != REGOP(TYPE_GLOBAL))