diff options
author | Srirangan <smadhavan@nvidia.com> | 2018-08-30 01:07:55 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-09-05 07:35:54 -0400 |
commit | 0f97bd4d44c8bcedf298f725fe0b6cfc70fa81ff (patch) | |
tree | 469b4746ebedb5843c631c547f102f72f5850ffa /drivers/gpu/nvgpu/gk20a/regops_gk20a.c | |
parent | 97aa9f705a84186ef0f7f31487988cfd5a8a94e8 (diff) |
gpu: nvgpu: gk20a: Fix MISRA 15.6 violations
MISRA Rule-15.6 requires that all if-else blocks be enclosed in braces,
including single statement blocks. Fix errors due to single statement
if blocks without braces by introducing the braces.
JIRA NVGPU-671
Change-Id: Icdeede22dd26fd70fae92aa791d35b115ef49e32
Signed-off-by: Srirangan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1797691
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/regops_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/regops_gk20a.c | 24 |
1 files changed, 15 insertions, 9 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/regops_gk20a.c b/drivers/gpu/nvgpu/gk20a/regops_gk20a.c index 26ba944a..80d27c25 100644 --- a/drivers/gpu/nvgpu/gk20a/regops_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/regops_gk20a.c | |||
@@ -36,11 +36,12 @@ static int regop_bsearch_range_cmp(const void *pkey, const void *pelem) | |||
36 | { | 36 | { |
37 | u32 key = *(u32 *)pkey; | 37 | u32 key = *(u32 *)pkey; |
38 | struct regop_offset_range *prange = (struct regop_offset_range *)pelem; | 38 | struct regop_offset_range *prange = (struct regop_offset_range *)pelem; |
39 | if (key < prange->base) | 39 | if (key < prange->base) { |
40 | return -1; | 40 | return -1; |
41 | else if (prange->base <= key && key < (prange->base + | 41 | } else if (prange->base <= key && key < (prange->base + |
42 | (prange->count * 4U))) | 42 | (prange->count * 4U))) { |
43 | return 0; | 43 | return 0; |
44 | } | ||
44 | return 1; | 45 | return 1; |
45 | } | 46 | } |
46 | 47 | ||
@@ -48,8 +49,9 @@ static inline bool linear_search(u32 offset, const u32 *list, int size) | |||
48 | { | 49 | { |
49 | int i; | 50 | int i; |
50 | for (i = 0; i < size; i++) { | 51 | for (i = 0; i < size; i++) { |
51 | if (list[i] == offset) | 52 | if (list[i] == offset) { |
52 | return true; | 53 | return true; |
54 | } | ||
53 | } | 55 | } |
54 | return false; | 56 | return false; |
55 | } | 57 | } |
@@ -111,8 +113,9 @@ int exec_regops_gk20a(struct dbg_session_gk20a *dbg_s, | |||
111 | * regops implementation, so we return -ENOSYS. This will allow | 113 | * regops implementation, so we return -ENOSYS. This will allow |
112 | * compute apps to run with vgpu. Tools will not work in this | 114 | * compute apps to run with vgpu. Tools will not work in this |
113 | * configuration and are not required to work at this time. */ | 115 | * configuration and are not required to work at this time. */ |
114 | if (g->is_virtual) | 116 | if (g->is_virtual) { |
115 | return -ENOSYS; | 117 | return -ENOSYS; |
118 | } | ||
116 | 119 | ||
117 | ok = validate_reg_ops(dbg_s, | 120 | ok = validate_reg_ops(dbg_s, |
118 | &ctx_rd_count, &ctx_wr_count, | 121 | &ctx_rd_count, &ctx_wr_count, |
@@ -134,8 +137,9 @@ int exec_regops_gk20a(struct dbg_session_gk20a *dbg_s, | |||
134 | 137 | ||
135 | for (i = 0; i < num_ops; i++) { | 138 | for (i = 0; i < num_ops; i++) { |
136 | /* if it isn't global then it is done in the ctx ops... */ | 139 | /* if it isn't global then it is done in the ctx ops... */ |
137 | if (ops[i].type != REGOP(TYPE_GLOBAL)) | 140 | if (ops[i].type != REGOP(TYPE_GLOBAL)) { |
138 | continue; | 141 | continue; |
142 | } | ||
139 | 143 | ||
140 | switch (ops[i].op) { | 144 | switch (ops[i].op) { |
141 | 145 | ||
@@ -358,8 +362,9 @@ static int validate_reg_op_offset(struct dbg_session_gk20a *dbg_s, | |||
358 | } | 362 | } |
359 | 363 | ||
360 | valid = check_whitelists(dbg_s, op, offset); | 364 | valid = check_whitelists(dbg_s, op, offset); |
361 | if ((op->op == REGOP(READ_64) || op->op == REGOP(WRITE_64)) && valid) | 365 | if ((op->op == REGOP(READ_64) || op->op == REGOP(WRITE_64)) && valid) { |
362 | valid = check_whitelists(dbg_s, op, offset + 4); | 366 | valid = check_whitelists(dbg_s, op, offset + 4); |
367 | } | ||
363 | 368 | ||
364 | if (valid && (op->type != REGOP(TYPE_GLOBAL))) { | 369 | if (valid && (op->type != REGOP(TYPE_GLOBAL))) { |
365 | err = gr_gk20a_get_ctx_buffer_offsets(dbg_s->g, | 370 | err = gr_gk20a_get_ctx_buffer_offsets(dbg_s->g, |
@@ -416,10 +421,11 @@ static bool validate_reg_ops(struct dbg_session_gk20a *dbg_s, | |||
416 | } | 421 | } |
417 | 422 | ||
418 | if (reg_op_is_gr_ctx(ops[i].type)) { | 423 | if (reg_op_is_gr_ctx(ops[i].type)) { |
419 | if (reg_op_is_read(ops[i].op)) | 424 | if (reg_op_is_read(ops[i].op)) { |
420 | (*ctx_rd_count)++; | 425 | (*ctx_rd_count)++; |
421 | else | 426 | } else { |
422 | (*ctx_wr_count)++; | 427 | (*ctx_wr_count)++; |
428 | } | ||
423 | } | 429 | } |
424 | 430 | ||
425 | /* if "allow_all" flag enabled, dont validate offset */ | 431 | /* if "allow_all" flag enabled, dont validate offset */ |