summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gk20a/pramin_gk20a.c
diff options
context:
space:
mode:
authorThomas Fleury <tfleury@nvidia.com>2018-03-07 12:23:53 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2018-03-13 03:04:16 -0400
commit6c33a010d8e3983cc3504e073cd552f952440aa1 (patch)
treec86e364d468320c8b347b58b6a711f773b97ae42 /drivers/gpu/nvgpu/gk20a/pramin_gk20a.c
parentf94c9d19c19883ca2b60acb8a000b34b32da0aa7 (diff)
gpu: nvgpu: add placeholder for IPA to PA
Add __nvgpu_sgl_phys function that can be used to implement IPA to PA translation in a subsequent change. Adapt existing function prototypes to add pointer to gpu context, as we will need to check if IPA to PA translation is needed. JIRA EVLR-2442 Bug 200392719 Change-Id: I5a734c958c8277d1bf673c020dafb31263f142d6 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1673142 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/pramin_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/pramin_gk20a.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/pramin_gk20a.c b/drivers/gpu/nvgpu/gk20a/pramin_gk20a.c
index 67fd2480..a76e2580 100644
--- a/drivers/gpu/nvgpu/gk20a/pramin_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/pramin_gk20a.c
@@ -34,7 +34,7 @@
34u32 gk20a_pramin_enter(struct gk20a *g, struct nvgpu_mem *mem, 34u32 gk20a_pramin_enter(struct gk20a *g, struct nvgpu_mem *mem,
35 struct nvgpu_sgt *sgt, struct nvgpu_sgl *sgl, u32 w) 35 struct nvgpu_sgt *sgt, struct nvgpu_sgl *sgl, u32 w)
36{ 36{
37 u64 bufbase = nvgpu_sgt_get_phys(sgt, sgl); 37 u64 bufbase = nvgpu_sgt_get_phys(g, sgt, sgl);
38 u64 addr = bufbase + w * sizeof(u32); 38 u64 addr = bufbase + w * sizeof(u32);
39 u32 hi = (u32)((addr & ~(u64)0xfffff) 39 u32 hi = (u32)((addr & ~(u64)0xfffff)
40 >> bus_bar0_window_target_bar0_window_base_shift_v()); 40 >> bus_bar0_window_target_bar0_window_base_shift_v());
@@ -48,7 +48,7 @@ u32 gk20a_pramin_enter(struct gk20a *g, struct nvgpu_mem *mem,
48 gk20a_dbg(gpu_dbg_mem, 48 gk20a_dbg(gpu_dbg_mem,
49 "0x%08x:%08x begin for %p,%p at [%llx,%llx] (sz %llx)", 49 "0x%08x:%08x begin for %p,%p at [%llx,%llx] (sz %llx)",
50 hi, lo, mem, sgl, bufbase, 50 hi, lo, mem, sgl, bufbase,
51 bufbase + nvgpu_sgt_get_phys(sgt, sgl), 51 bufbase + nvgpu_sgt_get_phys(g, sgt, sgl),
52 nvgpu_sgt_get_length(sgt, sgl)); 52 nvgpu_sgt_get_length(sgt, sgl));
53 53
54 WARN_ON(!bufbase); 54 WARN_ON(!bufbase);