diff options
author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2017-02-01 06:28:05 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-02-09 16:44:31 -0500 |
commit | de2dfd0c1ee5249f39ff58ce81cbdad0a5ad8cca (patch) | |
tree | e023ac24c4c63997d0f0cbb74a4558e302d78eb4 /drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | |
parent | 2caa3a9361bb0c9e08a7bb788387a379c73bc848 (diff) |
gpu: nvgpu: PMU perfmon interface header reorg
Moved perfmon interface from
pmu_api.h & pmu_gk20a.h to gpmuif_perfmon.h
header files
gpmuif_perfmon.h - PMU Command/Message Interfaces
PERFMON
Jira NVGPU-19
Change-Id: I983f89f0f6ec3b889d975178fb1405f166b7d1b9
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1297262
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/pmu_gk20a.h')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | 33 |
1 files changed, 0 insertions, 33 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h index b4a69720..87246f42 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | |||
@@ -134,39 +134,6 @@ struct pmu_ucode_desc_v1 { | |||
134 | */ | 134 | */ |
135 | #define ACR_ERROR_INVALID_TRANSCFG_SETUP (0xAC120001) | 135 | #define ACR_ERROR_INVALID_TRANSCFG_SETUP (0xAC120001) |
136 | 136 | ||
137 | /* PERFMON */ | ||
138 | #define PMU_DOMAIN_GROUP_PSTATE 0 | ||
139 | #define PMU_DOMAIN_GROUP_GPC2CLK 1 | ||
140 | #define PMU_DOMAIN_GROUP_NUM 2 | ||
141 | |||
142 | /* TBD: smart strategy */ | ||
143 | #define PMU_PERFMON_PCT_TO_INC 58 | ||
144 | #define PMU_PERFMON_PCT_TO_DEC 23 | ||
145 | |||
146 | struct pmu_perfmon_counter_v0 { | ||
147 | u8 index; | ||
148 | u8 flags; | ||
149 | u8 group_id; | ||
150 | u8 valid; | ||
151 | u16 upper_threshold; /* units of 0.01% */ | ||
152 | u16 lower_threshold; /* units of 0.01% */ | ||
153 | }; | ||
154 | |||
155 | struct pmu_perfmon_counter_v2 { | ||
156 | u8 index; | ||
157 | u8 flags; | ||
158 | u8 group_id; | ||
159 | u8 valid; | ||
160 | u16 upper_threshold; /* units of 0.01% */ | ||
161 | u16 lower_threshold; /* units of 0.01% */ | ||
162 | u32 scale; | ||
163 | }; | ||
164 | |||
165 | #define PMU_PERFMON_FLAG_ENABLE_INCREASE (0x00000001) | ||
166 | #define PMU_PERFMON_FLAG_ENABLE_DECREASE (0x00000002) | ||
167 | #define PMU_PERFMON_FLAG_CLEAR_PREV (0x00000004) | ||
168 | |||
169 | |||
170 | #define PMU_PGENG_GR_BUFFER_IDX_INIT (0) | 137 | #define PMU_PGENG_GR_BUFFER_IDX_INIT (0) |
171 | #define PMU_PGENG_GR_BUFFER_IDX_ZBC (1) | 138 | #define PMU_PGENG_GR_BUFFER_IDX_ZBC (1) |
172 | #define PMU_PGENG_GR_BUFFER_IDX_FECS (2) | 139 | #define PMU_PGENG_GR_BUFFER_IDX_FECS (2) |