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authorsmadhavan <smadhavan@nvidia.com>2018-09-05 03:20:15 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-09-06 19:15:30 -0400
commitc4ac750e985dddebe25308c7f9bd0a27a98feaa8 (patch)
treeffe645a1becda6bca10f893f164209b192e80a9a /drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
parent4451cf29d46cee3415e4dce42a8f67f3cc49070c (diff)
nvgpu: gk20a: MISRA Rule 21.2 header guard fixes
MISRA rule 21.2 doesn't allow the use of macro names which start with an underscore. These leading underscores are to be removed from the macro names. This patch will fix such violations caused by include guards by renaming them to follow the convention, 'NVGPU_PARENT-DIR_HEADER_H' JIRA NVGPU-1028 Change-Id: I478be317d067a75cdc8cb7fe9577a66d06318a11 Signed-off-by: smadhavan <smadhavan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1813068 GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Adeel Raza <araza@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/pmu_gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/pmu_gk20a.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
index ee7ee8c7..700a3a0e 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
@@ -23,8 +23,8 @@
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE. 24 * DEALINGS IN THE SOFTWARE.
25 */ 25 */
26#ifndef __PMU_GK20A_H__ 26#ifndef NVGPU_GK20A_PMU_GK20A_H
27#define __PMU_GK20A_H__ 27#define NVGPU_GK20A_PMU_GK20A_H
28 28
29#include <nvgpu/flcnif_cmn.h> 29#include <nvgpu/flcnif_cmn.h>
30#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h> 30#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
@@ -75,4 +75,4 @@ void gk20a_pmu_elpg_statistics(struct gk20a *g, u32 pg_engine_id,
75bool gk20a_pmu_is_engine_in_reset(struct gk20a *g); 75bool gk20a_pmu_is_engine_in_reset(struct gk20a *g);
76int gk20a_pmu_engine_reset(struct gk20a *g, bool do_reset); 76int gk20a_pmu_engine_reset(struct gk20a *g, bool do_reset);
77u32 gk20a_pmu_get_irqdest(struct gk20a *g); 77u32 gk20a_pmu_get_irqdest(struct gk20a *g);
78#endif /*__PMU_GK20A_H__*/ 78#endif /*NVGPU_GK20A_PMU_GK20A_H*/