diff options
| author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2017-02-01 10:05:48 -0500 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-02-09 16:44:31 -0500 |
| commit | 8afd83238a9676f6737f24269a99c79071debdc2 (patch) | |
| tree | 7708e8b561bedd2294bb8a19ffa898215934c468 /drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | |
| parent | de2dfd0c1ee5249f39ff58ce81cbdad0a5ad8cca (diff) | |
gpu: nvgpu: PMU ACR interface header reorg
Moved ACR interface from pmu_api.h to
gpmuif_acr.h header file
gpmuif_acr.h - PMU Command/Message Interfaces for
Access Control Region (ACR)
Jira NVGPU-19
Change-Id: Ic37ff3f4ca069aa4bdd6729bbfccc00e15185b02
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1297369
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/pmu_gk20a.h')
| -rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h index 87246f42..2f679970 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | |||
| @@ -124,16 +124,6 @@ struct pmu_ucode_desc_v1 { | |||
| 124 | u32 compressed; | 124 | u32 compressed; |
| 125 | }; | 125 | }; |
| 126 | 126 | ||
| 127 | /***************************** ACR ERROR CODES ******************************/ | ||
| 128 | /*! | ||
| 129 | * Error codes used in PMU-ACR Task | ||
| 130 | * | ||
| 131 | * LSF_ACR_INVALID_TRANSCFG_SETUP : Indicates that TRANSCFG Setup is not valid | ||
| 132 | * MAILBOX1 returns the CTXDMA ID of invalid setup | ||
| 133 | * | ||
| 134 | */ | ||
| 135 | #define ACR_ERROR_INVALID_TRANSCFG_SETUP (0xAC120001) | ||
| 136 | |||
| 137 | #define PMU_PGENG_GR_BUFFER_IDX_INIT (0) | 127 | #define PMU_PGENG_GR_BUFFER_IDX_INIT (0) |
| 138 | #define PMU_PGENG_GR_BUFFER_IDX_ZBC (1) | 128 | #define PMU_PGENG_GR_BUFFER_IDX_ZBC (1) |
| 139 | #define PMU_PGENG_GR_BUFFER_IDX_FECS (2) | 129 | #define PMU_PGENG_GR_BUFFER_IDX_FECS (2) |