diff options
author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2018-02-27 04:22:19 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-03-13 17:09:52 -0400 |
commit | 76ad9e8366f5c73d1ea47d54cea043f8cd9fa23e (patch) | |
tree | 6ca5a8ba117568252a1e75a28542d405a250e49e /drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | |
parent | 1d986dc33eae7cb56cd0a1beded5ba858f0535b9 (diff) |
gpu: nvgpu: Updated RPC to support copyback & callback
- Updated & added new parameter "bool is_copy_back" to
nvgpu_pmu_rpc_execute() to support copy back processed
RPC request from PMU to caller by passing parameter value
true & this blocks method till it receives ACK from PMU
for requested RPC.
- Added "struct rpc_handler_payload" to hold info
required for RPC handler like RPC buff address &
clear memory if copy back is not requested.
- Added define PMU_RPC_EXECUTE_CPB to support to copy back
processed RPC request from PMU to caller.
- Updated RPC callback handler support, crated memory &
assigned default handler if callback is not requested
else use callback parameters data to request to PMU.
- Added define PMU_RPC_EXECUTE_CB to support callback
- Updated pmu_wait_message_cond(), restricted condition
check to 8-bit instead 32-bit condition check.
Change-Id: Ic05289b074954979fd0102daf5ab806bf1f07b62
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1664962
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/pmu_gk20a.h')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h index 5bd43510..27d27007 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | |||
@@ -3,7 +3,7 @@ | |||
3 | * | 3 | * |
4 | * GK20A PMU (aka. gPMU outside gk20a context) | 4 | * GK20A PMU (aka. gPMU outside gk20a context) |
5 | * | 5 | * |
6 | * Copyright (c) 2011-2017, NVIDIA CORPORATION. All rights reserved. | 6 | * Copyright (c) 2011-2018, NVIDIA CORPORATION. All rights reserved. |
7 | * | 7 | * |
8 | * Permission is hereby granted, free of charge, to any person obtaining a | 8 | * Permission is hereby granted, free of charge, to any person obtaining a |
9 | * copy of this software and associated documentation files (the "Software"), | 9 | * copy of this software and associated documentation files (the "Software"), |
@@ -69,7 +69,7 @@ void gk20a_pmu_dump_falcon_stats(struct nvgpu_pmu *pmu); | |||
69 | 69 | ||
70 | void pmu_enable_irq(struct nvgpu_pmu *pmu, bool enable); | 70 | void pmu_enable_irq(struct nvgpu_pmu *pmu, bool enable); |
71 | int pmu_wait_message_cond(struct nvgpu_pmu *pmu, u32 timeout_ms, | 71 | int pmu_wait_message_cond(struct nvgpu_pmu *pmu, u32 timeout_ms, |
72 | u32 *var, u32 val); | 72 | void *var, u8 val); |
73 | void pmu_handle_fecs_boot_acr_msg(struct gk20a *g, struct pmu_msg *msg, | 73 | void pmu_handle_fecs_boot_acr_msg(struct gk20a *g, struct pmu_msg *msg, |
74 | void *param, u32 handle, u32 status); | 74 | void *param, u32 handle, u32 status); |
75 | void gk20a_pmu_elpg_statistics(struct gk20a *g, u32 pg_engine_id, | 75 | void gk20a_pmu_elpg_statistics(struct gk20a *g, u32 pg_engine_id, |