gpu: nvgpu: PG engines init/allow/disallow update

- pmu_init_powergating loops & init multiple
  PG engines based on PG engines supported
- generalize pg init param HAL to support
  multiple PG-engine init based on PG engine
  parameter
- HAL's to return supported PG engines on chip &
  its sub features of engine.
- Send Allow/Disallow for PG engines which are
  enabled & supported.
- Added defines for pg engines

JIRA DNVGPU-71

Change-Id: I236601e092e519a269fcb17c7d1c523a4b51405f
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1247409
(cherry-picked from commit 1c138cc475bac7d3c3fbbd5fb18cfcb2e7fdf67a)
Reviewed-on: http://git-master/r/1269319
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 7 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
index bfb6f117..78652bcb 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
@@ -615,6 +615,10 @@ struct pmu_pg_stats {
 #define PMU_PG_IDLE_THRESHOLD                   15000
 #define PMU_PG_POST_POWERUP_IDLE_THRESHOLD      1000000
 
+#define PMU_PG_ELPG_ENGINE_ID_GRAPHICS (0x00000000)
+#define PMU_PG_ELPG_ENGINE_ID_MS       (0x00000004)
+#define PMU_PG_ELPG_ENGINE_ID_INVALID_ENGINE (0x00000005)
+
 /* state transition :
     OFF => [OFF_ON_PENDING optional] => ON_PENDING => ON => OFF
     ON => OFF is always synchronized */
@@ -771,6 +775,9 @@ int gk20a_pmu_cmd_post(struct gk20a *g, struct pmu_cmd *cmd, struct pmu_msg *msg
 int gk20a_pmu_enable_elpg(struct gk20a *g);
 int gk20a_pmu_disable_elpg(struct gk20a *g);
 
+u32 gk20a_pmu_pg_engines_list(struct gk20a *g);
+u32 gk20a_pmu_pg_feature_list(struct gk20a *g, u32 pg_engine_id);
+
 void gk20a_pmu_save_zbc(struct gk20a *g, u32 entries);
 
 int gk20a_pmu_perfmon_enable(struct gk20a *g, bool enable);