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authorTerje Bergstrom <tbergstrom@nvidia.com>2016-05-19 12:28:30 -0400
committerTerje Bergstrom <tbergstrom@nvidia.com>2016-05-20 16:58:00 -0400
commit72ae2dedf56e8d8f252497e7cadc80dd9c90ff81 (patch)
tree14c73b2c89c74492edb39b0d01dd740c884ec28e /drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
parenta21e56d584641202327f64741b06b1cd9633d0f6 (diff)
gpu: nvgpu: Add HAL op for PMU reset
Sequence to reset PMU is different for iGPU and dGPU. Specialize and implement iGPU version. Change-Id: I5b9ff2c018a736bc9e27b90d0942c52706b12a12 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1150540
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/pmu_gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/pmu_gk20a.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
index efe03f13..b8bb18a2 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
@@ -1426,5 +1426,6 @@ void pmu_handle_fecs_boot_acr_msg(struct gk20a *g, struct pmu_msg *msg,
1426 void *param, u32 handle, u32 status); 1426 void *param, u32 handle, u32 status);
1427void gk20a_pmu_elpg_statistics(struct gk20a *g, 1427void gk20a_pmu_elpg_statistics(struct gk20a *g,
1428 u32 *ingating_time, u32 *ungating_time, u32 *gating_cnt); 1428 u32 *ingating_time, u32 *ungating_time, u32 *gating_cnt);
1429int gk20a_pmu_reset(struct gk20a *g);
1429 1430
1430#endif /*__PMU_GK20A_H__*/ 1431#endif /*__PMU_GK20A_H__*/