diff options
author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2016-11-03 11:40:24 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2016-12-26 01:20:09 -0500 |
commit | 71fbfdb2b84a4f778f19e44421a66e28e5aadf8d (patch) | |
tree | 5bbc2e22682e73b64fa6492bdab27301f254d362 /drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | |
parent | 66ed536fb5e57ad73ffbaf24f9c02f0655e7d6cc (diff) |
gpu: nvgpu: MSCG support
- Added enable_mscg, mscg_enabled & mscg_stat flags,
mscg_enabled flag can be used to controll
mscg enable/disable at runtime along with mscg_stat flag.
- Added defines & interface to support ms/mclk-change/post-init-param
- Added defines for lpwr tables read from vbios.
- HAL to support post init param which is require
to setup clockgating interface in PMU & interfaces used during
mscg state machine.
- gk20a_pmu_pg_global_enable() can be called when pg support
required to enable/disable, this also checks & wait
if pstate switch is in progress till it complets
- pg_mutex to protect PG-RPPG/MSCG enable/disable
JIRA DNVGPU-71
Change-Id: If312cefc888a4de0a5c96898baeaac1a76e53e46
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1247554
(cherry picked from commit e6c94948b8058ba642ea56677ad798fc56b8a28a)
Reviewed-on: http://git-master/r/1270971
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/pmu_gk20a.h')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h index 78652bcb..56300dc8 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | |||
@@ -629,6 +629,9 @@ struct pmu_pg_stats { | |||
629 | #define PMU_ELPG_STAT_OFF_ON_PENDING 4 /* elpg is off, caller has requested on, but ALLOW | 629 | #define PMU_ELPG_STAT_OFF_ON_PENDING 4 /* elpg is off, caller has requested on, but ALLOW |
630 | cmd hasn't been sent due to ENABLE_ALLOW delay */ | 630 | cmd hasn't been sent due to ENABLE_ALLOW delay */ |
631 | 631 | ||
632 | #define PMU_MSCG_DISABLED 0 | ||
633 | #define PMU_MSCG_ENABLED 1 | ||
634 | |||
632 | /* Falcon Register index */ | 635 | /* Falcon Register index */ |
633 | #define PMU_FALCON_REG_R0 (0) | 636 | #define PMU_FALCON_REG_R0 (0) |
634 | #define PMU_FALCON_REG_R1 (1) | 637 | #define PMU_FALCON_REG_R1 (1) |
@@ -716,10 +719,13 @@ struct pmu_gk20a { | |||
716 | 719 | ||
717 | u32 elpg_stat; | 720 | u32 elpg_stat; |
718 | 721 | ||
722 | u32 mscg_stat; | ||
723 | |||
719 | int pmu_state; | 724 | int pmu_state; |
720 | 725 | ||
721 | #define PMU_ELPG_ENABLE_ALLOW_DELAY_MSEC 1 /* msec */ | 726 | #define PMU_ELPG_ENABLE_ALLOW_DELAY_MSEC 1 /* msec */ |
722 | struct work_struct pg_init; | 727 | struct work_struct pg_init; |
728 | struct mutex pg_mutex; /* protect pg-RPPG/MSCG enable/disable */ | ||
723 | struct mutex elpg_mutex; /* protect elpg enable/disable */ | 729 | struct mutex elpg_mutex; /* protect elpg enable/disable */ |
724 | int elpg_refcnt; /* disable -1, enable +1, <=0 elpg disabled, > 0 elpg enabled */ | 730 | int elpg_refcnt; /* disable -1, enable +1, <=0 elpg disabled, > 0 elpg enabled */ |
725 | 731 | ||
@@ -774,6 +780,7 @@ int gk20a_pmu_cmd_post(struct gk20a *g, struct pmu_cmd *cmd, struct pmu_msg *msg | |||
774 | 780 | ||
775 | int gk20a_pmu_enable_elpg(struct gk20a *g); | 781 | int gk20a_pmu_enable_elpg(struct gk20a *g); |
776 | int gk20a_pmu_disable_elpg(struct gk20a *g); | 782 | int gk20a_pmu_disable_elpg(struct gk20a *g); |
783 | int gk20a_pmu_pg_global_enable(struct gk20a *g, u32 enable_pg); | ||
777 | 784 | ||
778 | u32 gk20a_pmu_pg_engines_list(struct gk20a *g); | 785 | u32 gk20a_pmu_pg_engines_list(struct gk20a *g); |
779 | u32 gk20a_pmu_pg_feature_list(struct gk20a *g, u32 pg_engine_id); | 786 | u32 gk20a_pmu_pg_feature_list(struct gk20a *g, u32 pg_engine_id); |