diff options
author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2018-07-11 05:30:45 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-07-31 04:25:41 -0400 |
commit | 2d454db04fcc0c03e05b4665831e5780240d79b8 (patch) | |
tree | c18fd4bc302ea68e57e1e1d95c0f253e800bc043 /drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | |
parent | d32692ae2427693daf85b3c7b4e24cd36471dec6 (diff) |
gpu: nvgpu: falcon queue support
-Renamed "struct pmu_queue" to "struct
nvgpu_falcon_queue" & moved to falcon.h
-Renamed pmu_queue_* functions to flcn_queue_* &
moved to new file falcon_queue.c
-Created ops for queue functions in struct
nvgpu_falcon_queue to support different queue
types like DMEM/FB-Q.
-Created ops in nvgpu_falcon_engine_dependency_ops
to add engine specific queue functionality & assigned
correct HAL functions in hal*.c file.
-Made changes in dependent functions as needed to replace
struct pmu_queue & calling queue functions using
nvgpu_falcon_queue data structure.
-Replaced input param "struct nvgpu_pmu *pmu" with
"struct gk20a *g" for pmu ops pmu_queue_head/pmu_queue_tail
& also for functions gk20a_pmu_queue_head()/
gk20a_pmu_queue_tail().
-Made changes in nvgpu_pmu_queue_init() to use nvgpu_falcon_queue
for PMU queue.
-Modified Makefile to include falcon_queue.o
-Modified Makefile.sources to include falcon_queue.c
Change-Id: I956328f6631b7154267fd5a29eaa1826190d99d1
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1776070
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/pmu_gk20a.h')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h index 27d27007..d9c53c28 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | |||
@@ -49,9 +49,9 @@ void gk20a_pmu_pg_idle_counter_config(struct gk20a *g, u32 pg_engine_id); | |||
49 | int gk20a_pmu_mutex_acquire(struct nvgpu_pmu *pmu, u32 id, u32 *token); | 49 | int gk20a_pmu_mutex_acquire(struct nvgpu_pmu *pmu, u32 id, u32 *token); |
50 | int gk20a_pmu_mutex_release(struct nvgpu_pmu *pmu, u32 id, u32 *token); | 50 | int gk20a_pmu_mutex_release(struct nvgpu_pmu *pmu, u32 id, u32 *token); |
51 | 51 | ||
52 | int gk20a_pmu_queue_head(struct nvgpu_pmu *pmu, struct pmu_queue *queue, | 52 | int gk20a_pmu_queue_head(struct gk20a *g, struct nvgpu_falcon_queue *queue, |
53 | u32 *head, bool set); | 53 | u32 *head, bool set); |
54 | int gk20a_pmu_queue_tail(struct nvgpu_pmu *pmu, struct pmu_queue *queue, | 54 | int gk20a_pmu_queue_tail(struct gk20a *g, struct nvgpu_falcon_queue *queue, |
55 | u32 *tail, bool set); | 55 | u32 *tail, bool set); |
56 | void gk20a_pmu_msgq_tail(struct nvgpu_pmu *pmu, u32 *tail, bool set); | 56 | void gk20a_pmu_msgq_tail(struct nvgpu_pmu *pmu, u32 *tail, bool set); |
57 | 57 | ||