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author | Bharat Nihalani <bnihalani@nvidia.com> | 2015-05-29 06:56:23 -0400 |
---|---|---|
committer | Bharat Nihalani <bnihalani@nvidia.com> | 2015-06-02 23:18:55 -0400 |
commit | 1d8fdf56959240622073dd771dd9bfccf31b8f8e (patch) | |
tree | 5c670e604825ddc25d6b6b0cce32cb3e7dc6871a /drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | |
parent | 38cee4d7effe5a2079a08b3c9a216b3197893959 (diff) |
Revert "Revert "Revert "gpu: nvgpu: New allocator for VA space"""
This reverts commit ce1cf06b9a8eb6314ba0ca294e8cb430e1e141c0 since
it causes GPU pbdma interrupt to be generated.
Bug 200106514
Change-Id: If3ed9a914c4e3e7f3f98c6609c6dbf57e1eb9aad
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/749291
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/pmu_gk20a.h')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h index f29c810e..73530b22 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | |||
@@ -3,7 +3,7 @@ | |||
3 | * | 3 | * |
4 | * GK20A PMU (aka. gPMU outside gk20a context) | 4 | * GK20A PMU (aka. gPMU outside gk20a context) |
5 | * | 5 | * |
6 | * Copyright (c) 2011-2015, NVIDIA CORPORATION. All rights reserved. | 6 | * Copyright (c) 2011-2014, NVIDIA CORPORATION. All rights reserved. |
7 | * | 7 | * |
8 | * This program is free software; you can redistribute it and/or modify it | 8 | * This program is free software; you can redistribute it and/or modify it |
9 | * under the terms and conditions of the GNU General Public License, | 9 | * under the terms and conditions of the GNU General Public License, |
@@ -466,7 +466,7 @@ struct pmu_ucode_desc { | |||
466 | #define PMU_UNIT_ID_IS_VALID(id) \ | 466 | #define PMU_UNIT_ID_IS_VALID(id) \ |
467 | (((id) < PMU_UNIT_END) || ((id) >= PMU_UNIT_TEST_START)) | 467 | (((id) < PMU_UNIT_END) || ((id) >= PMU_UNIT_TEST_START)) |
468 | 468 | ||
469 | #define PMU_DMEM_ALLOC_ALIGNMENT (4) | 469 | #define PMU_DMEM_ALLOC_ALIGNMENT (32) |
470 | #define PMU_DMEM_ALIGNMENT (4) | 470 | #define PMU_DMEM_ALIGNMENT (4) |
471 | 471 | ||
472 | #define PMU_CMD_FLAGS_PMU_MASK (0xF0) | 472 | #define PMU_CMD_FLAGS_PMU_MASK (0xF0) |